| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 31 # define R12 3
|
| /art/runtime/arch/arm/ |
| registers_arm.h | 39 R12 = 12,
|
| /external/kernel-headers/original/asm-x86/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 31 #define R12 24
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 42 #define R12 24
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-arm-linux.c | 150 SC2(ip,R12);
329 REST(ip,R12);
|
| sigframe-amd64-linux.c | 349 SC2(r12,R12);
582 tst->arch.vex.guest_R12 = sc->r12;
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 92 case X86::ECX: case X86::R12: return 2;
576 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
613 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
649 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
685 case X86::R12B: case X86::R12W: case X86::R12D: case X86::R12:
686 return X86::R12;
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAndOrXor.cpp | 568 Value *R11,*R12;
570 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) {
572 A = R11; D = R12;
573 } else if (R12 == L11 || R12 == L12 || R12 == L21 || R12 == L22) {
574 A = R12; D = R11;
579 } else if (match(R1, m_And(m_Value(R11), m_Value(R12)))) {
581 A = R11; D = R12; E = R2; ok = true
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 509 BuildMI(MBB, MBBI, dl, TII.get(PPC::LIS), PPC::R12)
511 BuildMI(MBB, MBBI, dl, TII.get(PPC::ORI), PPC::R12)
512 .addReg(PPC::R12, RegState::Kill)
516 .addReg(PPC::R12, RegState::Kill);
[all...] |
| PPCAsmPrinter.cpp | [all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 173 ENTRY(R12) \
191 ENTRY(R12) \
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerInterface.h | 50 R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15,
58 LIST(R7), LIST(R8), LIST(R9), LIST(R10), LIST(R11), LIST(R12),
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.cpp | 517 // the function, the offset will be negative. Use R12 instead since that's
522 .addReg(ARM::R12, RegState::Define)
526 // interference with R12 before then, however, we'll need to restore it
532 // If this instruction affects R12, adjust our restore point.
535 if (MO.isRegMask() && MO.clobbersPhysReg(ARM::R12)) {
543 if (MO.getReg() == ARM::R12) {
550 // Restore the register from R12
552 addReg(Reg, RegState::Define).addReg(ARM::R12, RegState::Kill));
|
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 112 GENOFFSET(AMD64,amd64,R12);
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 669 case X86::R12: case X86::R13: case X86::R14: case X86::R15:
|
| /art/compiler/utils/arm/ |
| assembler_arm.cc | [all...] |
