/external/llvm/lib/Target/NVPTX/ |
NVPTXISelDAGToDAG.h | 61 SDNode *Select(SDNode *N); 62 SDNode *SelectLoad(SDNode *N); 63 SDNode *SelectLoadVector(SDNode *N); 64 SDNode *SelectLDGLDUVector(SDNode *N); 65 SDNode *SelectStore(SDNode *N) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypes.h | 81 bool IgnoreNodeResults(SDNode *N) const { 120 SmallVector<SDNode*, 128> Worklist; 135 void NoteDeletion(SDNode *Old, SDNode *New) { 145 SDNode *AnalyzeNewNode(SDNode *N); 147 void ExpungeNode(SDNode *N); 155 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); 156 bool CustomWidenLowerNode(SDNode *N, EVT VT); 161 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) [all...] |
InstrEmitter.h | 42 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, 49 unsigned getDstOfOnlyCopyToRegUse(SDNode *Node, 52 void CreateVirtualRegisters(SDNode *Node, 92 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 99 void EmitCopyToRegClassNode(SDNode *Node, 104 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 110 static unsigned CountResults(SDNode *Node); 119 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned, 138 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, 140 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned [all...] |
SelectionDAGPrinter.cpp | 43 return ((const SDNode *) Node)->getNumValues(); 47 return ((const SDNode *) Node)->getValueType(i).getEVTString(); 52 return itostr(I - SDNodeIterator::begin((const SDNode *) Node)); 68 SDNode *TargetNode = *I; 82 static bool hasNodeAddressLabel(const SDNode *Node, 102 static std::string getSimpleNodeLabel(const SDNode *Node, 111 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph); 112 static std::string getNodeAttributes(const SDNode *N, 136 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node, 176 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) [all...] |
ScheduleDAGSDNodes.h | 1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===// 11 // scheduling for an SDNode-based dependency graph. 22 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs. 32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output 55 static bool isPassiveNode(SDNode *Node) { 75 SUnit *newSUnit(SDNode *N); 102 virtual void computeOperandLatency(SDNode *Def, SDNode *Use, 135 const SDNode *Node; 149 const SDNode *GetNode() const [all...] |
SDNodeDbgValue.h | 24 class SDNode; 33 SDNODE = 0, // value is the result of an expression 41 SDNode *Node; // valid for expressions 54 SDDbgValue(MDNode *mdP, SDNode *N, unsigned R, uint64_t off, DebugLoc dl, 57 kind = SDNODE; 83 // Returns the SDNode* for a register ref 84 SDNode *getSDNode() { assert (kind==SDNODE); return u.s.Node; } 87 unsigned getResNo() { assert (kind==SDNODE); return u.s.ResNo; } 106 // property. A SDDbgValue is invalid if the SDNode that produces the value i [all...] |
ScheduleDAGSDNodes.cpp | 68 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { 110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, 135 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, 162 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) { 164 SDNode *GlueDestNode = Glue.getNode(); 190 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) { 207 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) { 208 SDNode *Chain = 0; 217 SmallPtrSet<SDNode*, 16> Visited [all...] |
LegalizeFloatTypes.cpp | 47 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { 109 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { 113 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, 119 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { 134 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) { 141 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) { 153 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) { 166 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) { 178 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) { 220 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) [all...] |
SelectionDAGDumper.cpp | 33 std::string SDNode::getOperationName(const SelectionDAG *G) const { 316 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 326 void SDNode::dump() const { dump(0); } 327 void SDNode::dump(const SelectionDAG *G) const { 332 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 345 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 513 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 531 const SDNode *N = I; 540 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 545 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.h | 26 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc DL, 33 void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg); 35 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 38 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node);
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MipsISelDAGToDAG.h | 45 SDNode *getGlobalBaseReg(); 68 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 71 virtual SDNode *Select(SDNode *N); 73 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0; 76 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
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MipsSEISelDAGToDAG.h | 35 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl, 38 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, 39 SDLoc DL, SDNode *Node) const; 50 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node);
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MipsModuleISelDAGToDAG.h | 50 virtual SDNode *Select(SDNode *N) {
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MipsISelDAGToDAG.cpp | 58 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() { 84 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 92 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) { 105 std::pair<bool, SDNode*> Ret = selectNode(Node); 128 SDNode *ResNode = SelectCode(Node);
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Mips16ISelDAGToDAG.cpp | 44 std::pair<SDNode*, SDNode*> 45 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty, 47 SDNode *Lo = 0, *Hi = 0; 48 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0), 125 void Mips16DAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) { 160 SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset, 238 std::pair<bool, SDNode*> Mips16DAGToDAGISel::selectNode(SDNode *Node) { 277 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops) [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAGISel.h | 80 virtual SDNode *Select(SDNode *N) = 0; 95 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const; 101 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, 191 void ReplaceUses(SDNode *F, SDNode *T) { 221 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const { 225 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N [all...] |
SelectionDAG.h | 11 // SDNode class and subclasses. 41 template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> { 43 mutable ilist_half_node<SDNode> Sentinel; 45 SDNode *createSentinel() const { 46 return static_cast<SDNode*>(&Sentinel); 48 static void destroySentinel(SDNode *) {} 50 SDNode *provideInitialHead() const { return createSentinel(); } 51 SDNode *ensureHead(SDNode*) const { return createSentinel(); [all...] |
SelectionDAGNodes.h | 10 // This file declares the SDNode class and derived classes, which are used to 44 class SDNode; 51 void checkForCycles(const SDNode *N); 67 bool isBuildVectorAllOnes(const SDNode *N); 71 bool isBuildVectorAllZeros(const SDNode *N); 76 bool isScalarToVector(const SDNode *N); 80 bool allOperandsUndef(const SDNode *N); 95 SDNode *Node; // The node defining the value we are using. 99 SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) {} 101 /// get the index which selects a specific result in the SDNode [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.h | 40 SDNode *foldOperands(MachineSDNode *N, SelectionDAG &DAG) const; 59 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 60 virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const; 62 SDNode *Node) const; 64 int32_t analyzeImmediate(const SDNode *N) const;
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/external/llvm/lib/Target/MSP430/ |
MSP430ISelDAGToDAG.cpp | 118 SDNode *Select(SDNode *N); 119 SDNode *SelectIndexedLoad(SDNode *Op); 120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, 330 SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) { 354 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 62 bool hasNumUsesBelowThresGA(SDNode *N) const; 64 SDNode *Select(SDNode *N); 90 bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset); 92 SDNode *SelectLoad(SDNode *N); 93 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl); 94 SDNode *SelectIndexedLoad(LoadSDNode *LD, SDLoc dl); 95 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode, 97 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | 99 SDNode *SelectAtomic(SDNode *N, unsigned Op8, unsigned Op16, unsigned Op32, 106 SDNode *TrySelectToMoveImm(SDNode *N); 107 SDNode *LowerToFPLitPool(SDNode *Node); 108 SDNode *SelectToLitPool(SDNode *N); 110 SDNode* Select(SDNode*); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelDAGToDAG.cpp | 47 SDNode *Select(SDNode *N); 48 SDNode *SelectBRIND(SDNode *N); 56 inline bool immMskBitp(SDNode *inN) const { 109 SDNode *XCoreDAGToDAGISel::Select(SDNode *N) { 127 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, 174 if (SDNode *ResNode = SelectBRIND(N)) 209 SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) [all...] |
/external/llvm/include/llvm/Target/ |
TargetInstrInfo.h | 32 class SDNode; 570 virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, 571 SmallVectorImpl<SDNode*> &NewNodes) const { 592 virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, 605 virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 44 SDNode *Select(SDNode *N); 64 SDNode* getGlobalBaseReg(); 68 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() { 140 SDNode *SparcDAGToDAGISel::Select(SDNode *N) { 181 SDNode *Mul = CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::Glue,
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