| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 208 ISD::SETEQ);
222 ISD::SETEQ);
259 Quotient, Quotient_A_One, ISD::SETEQ);
263 Quotient_S_One, Div, ISD::SETEQ);
275 Remainder, Remainder_S_Den, ISD::SETEQ);
279 Remainder_A_Den, Rem, ISD::SETEQ);
|
| R600ISelLowering.cpp | 450 case ISD::SETEQ:
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 208 ISD::SETEQ);
222 ISD::SETEQ);
259 Quotient, Quotient_A_One, ISD::SETEQ);
263 Quotient_S_One, Div, ISD::SETEQ);
275 Remainder, Remainder_S_Den, ISD::SETEQ);
279 Remainder_A_Den, Rem, ISD::SETEQ);
|
| R600ISelLowering.cpp | 450 case ISD::SETEQ:
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 302 case ISD::SETEQ:
367 ISD::SETEQ);
381 ISD::SETEQ);
418 Quotient, Quotient_A_One, ISD::SETEQ);
422 Quotient_S_One, Div, ISD::SETEQ);
434 Remainder, Remainder_S_Den, ISD::SETEQ);
438 Remainder_A_Den, Rem, ISD::SETEQ);
|
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 112 case ISD::SETEQ:
[all...] |
| SelectionDAGDumper.cpp | 301 case ISD::SETEQ: return "seteq";
|
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeFloatTypes.cpp | [all...] |
| SelectionDAG.cpp | 250 /// if the operation does not depend on the sign of the input (setne and seteq).
254 case ISD::SETEQ:
309 case ISD::SETOEQ: // SETEQ & SETU[LG]E
310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 704 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 478 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
480 // SETEQ/SETNE comparison with 16-bit immediate, fold it.
519 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
521 // SETEQ/SETNE comparison with 16-bit immediate, fold it.
578 case ISD::SETEQ: return PPC::PRED_EQ;
609 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ
634 case ISD::SETEQ:
726 case ISD::SETEQ: {
755 case ISD::SETEQ:
802 case ISD::SETEQ
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 593 CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
594 CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
595 CCs[RTLIB::OEQ_F128] = ISD::SETEQ;
614 CCs[RTLIB::O_F32] = ISD::SETEQ;
615 CCs[RTLIB::O_F64] = ISD::SETEQ;
616 CCs[RTLIB::O_F128] = ISD::SETEQ;
[all...] |
| Analysis.cpp | 174 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
189 case ICmpInst::ICMP_EQ: return ISD::SETEQ;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 448 case ISD::SETEQ:
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 209 setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ);
228 setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ);
276 setCmpLibcallCC(RTLIB::UNE_F64, ISD::SETEQ);
288 setCmpLibcallCC(RTLIB::O_F64, ISD::SETEQ);
314 setCmpLibcallCC(RTLIB::UNE_F32, ISD::SETEQ);
326 setCmpLibcallCC(RTLIB::O_F32, ISD::SETEQ);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 709 case ISD::SETEQ:
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
