| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 188 /// like ADDC/SUBC, which indicate the carry result is always false.
195 ADDC, SUBC,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 257 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
|
| MipsSEISelDAGToDAG.cpp | 222 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
|
| MipsSEISelLowering.cpp | 245 // SUBENode's second operand must be a flag output of an SUBC node in order
249 if (SUBCNode->getOpcode() != ISD::SUBC)
295 // replace uses of sube and subc here
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 82 SUBC, // Sub with carry
|
| ARMISelLowering.cpp | 669 setOperationAction(ISD::SUBC, MVT::i32, Custom);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 112 setOperationAction(ISD::SUBC, VT, Expand);
212 setOperationAction(ISD::SUBC, MVT::Other, Expand);
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 101 setOperationAction(ISD::SUBC, VT, Expand);
195 setOperationAction(ISD::SUBC, MVT::Other, Expand);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 112 setOperationAction(ISD::SUBC, VT, Expand);
212 setOperationAction(ISD::SUBC, MVT::Other, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 204 case ISD::SUBC: return "subc";
|
| LegalizeIntegerTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 93 setOperationAction(ISD::SUBC, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 428 setOperationAction(ISD::SUBC, VT, Custom);
[all...] |
