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Searched
refs:TRC
(Results
1 - 10
of
10
) sorted by null
/external/chromium_org/third_party/qcms/src/
transform_util.h
50
float *build_input_gamma_table(struct curveType *
TRC
);
52
void build_output_lut(struct curveType *
trc
,
56
qcms_bool compute_precache(struct curveType *
trc
, uint8_t *output);
transform_util.c
253
float *build_input_gamma_table(struct curveType *
TRC
)
257
if (!
TRC
) return NULL;
260
if (
TRC
->type == PARAMETRIC_CURVE_TYPE) {
261
compute_curve_gamma_table_type_parametric(gamma_table,
TRC
->parameter,
TRC
->count);
263
if (
TRC
->count == 0) {
265
} else if (
TRC
->count == 1) {
266
compute_curve_gamma_table_type1(gamma_table, u8Fixed8Number_to_float(
TRC
->data[0]));
268
compute_curve_gamma_table_type2(gamma_table,
TRC
->data,
TRC
->count)
[
all
...]
/external/llvm/lib/Target/ARM/
A15SDOptimizer.cpp
80
const TargetRegisterClass *
TRC
);
104
bool usesRegClass(MachineOperand &MO, const TargetRegisterClass *
TRC
);
140
const TargetRegisterClass *
TRC
) {
146
return MRI->getRegClass(Reg)->hasSuperClassEq(
TRC
);
148
return
TRC
->contains(Reg);
282
const TargetRegisterClass *
TRC
=
284
if (
TRC
->hasSuperClassEq(MRI->getRegClass(FullReg))) {
454
const TargetRegisterClass *
TRC
) {
455
unsigned Out = MRI->createVirtualRegister(
TRC
);
ARMISelLowering.cpp
[
all
...]
ARMLoadStoreOptimizer.cpp
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp
476
const TargetRegisterClass *
TRC
=
485
TRC
== MRI->getRegClass(SrcReg)) {
491
VRBase = MRI->createVirtualRegister(
TRC
);
505
VRBase = MRI->createVirtualRegister(
TRC
);
610
const TargetRegisterClass *
TRC
= MRI->getRegClass(SubReg);
612
TRI->getMatchingSuperRegClass(RC,
TRC
, SubIdx);
[
all
...]
/external/chromium_org/native_client_sdk/src/examples/tutorial/debugging/
example.js
131
if (msg_type == '
TRC
:') {
/external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp
564
const TargetRegisterClass *
TRC
;
566
TRC
= &Hexagon::PredRegsRegClass;
568
TRC
= &Hexagon::IntRegsRegClass;
570
TRC
= &Hexagon::DoubleRegsRegClass;
575
unsigned NewReg = RegInfo.createVirtualRegister(
TRC
);
[
all
...]
/external/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp
370
const TargetRegisterClass *
TRC
372
unsigned scratch = (!BinOpcode) ? incr : MRI.createVirtualRegister(
TRC
);
442
const TargetRegisterClass *
TRC
, *TRCsp;
444
TRC
= &AArch64::GPR64RegClass;
447
TRC
= &AArch64::GPR32RegClass;
465
unsigned scratch = MRI.createVirtualRegister(
TRC
);
[
all
...]
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