| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 29 /// instruction. This will generate a urem in the process, and Builder's insert
42 // ; %urem = urem i32 %dividend, %divisor
43 // ; %xored = xor i32 %urem, %dividend_sgn
51 Value *URem = Builder.CreateURem(UDividend, UDivisor);
52 Value *Xored = Builder.CreateXor(URem, DividendSign);
55 if (Instruction *URemInst = dyn_cast<Instruction>(URem))
64 /// code generated, e.g. at the urem instruction. This will generate a udiv in
336 Rem->getOpcode() == Instruction::URem) &&
352 if (!BO || BO->getOpcode() != Instruction::URem)
[all...] |
| BypassSlowDivision.cpp | 126 // udiv/urem because optimization only handles positive numbers
233 bool UseRemOp = Opcode == Instruction::SRem || Opcode == Instruction::URem;
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| SimplifyIndVar.cpp | 245 if (IsSigned || Rem->getOpcode() == Instruction::URem) {
|
| /external/llvm/unittests/Transforms/Utils/ |
| IntegerDivision.cpp | 112 TEST(IntegerDivision, URem) {
131 EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem);
|
| /external/llvm/lib/Analysis/ |
| CostModel.cpp | 132 case Instruction::URem:
|
| ValueTracking.cpp | 583 case Instruction::URem: {
[all...] |
| InstructionSimplify.cpp | [all...] |
| /external/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCUtil.cpp | 220 case Instruction::SRem: case Instruction::URem: case Instruction::FRem:
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineVectorOps.cpp | 525 case Instruction::URem:
588 case Instruction::URem:
685 case Instruction::URem:
[all...] |
| InstCombineCasts.cpp | 185 case Instruction::URem: {
368 case Instruction::URem: {
369 // UDiv and URem can be truncated if all the truncated bits are zero.
[all...] |
| InstCombineSimplifyDemanded.cpp | [all...] |
| /external/llvm/lib/IR/ |
| ConstantFold.cpp | [all...] |
| Instruction.cpp | 207 case URem: return "urem";
|
| Constants.cpp | 263 case Instruction::URem:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 352 J->getOpcode() == Instruction::URem ||
|
| /external/llvm/include/llvm/Support/ |
| PatternMatch.h | 448 inline BinaryOp_match<LHS, RHS, Instruction::URem>
450 return BinaryOp_match<LHS, RHS, Instruction::URem>(L, R);
[all...] |
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | 697 // Additional macros to execute binary operations udiv/sdiv/urem/srem since
736 case Instruction::URem: INTEGER_VECTOR_FUNCTION(urem) break;
778 case Instruction::URem: R.IntVal = Src1.IntVal.urem(Src2.IntVal); break;
[all...] |
| /external/llvm/lib/Target/CppBackend/ |
| CPPBackend.cpp | 865 case Instruction::URem: Out << "getURem("; break;
[all...] |
| /external/llvm/lib/Transforms/Vectorize/ |
| SLPVectorizer.cpp | 744 case Instruction::URem:
858 case Instruction::URem:
[all...] |
| LoopVectorize.cpp | [all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 718 case Instruction::URem:
736 case Instruction::URem:GV.IntVal = LHS.IntVal.urem(RHS.IntVal); break;
[all...] |
| /external/llvm/lib/AsmParser/ |
| LLLexer.cpp | 647 INSTKEYWORD(urem, URem); INSTKEYWORD(srem, SRem); INSTKEYWORD(frem, FRem);
|
| /external/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 346 case 6:{Op = (isFloat?Instruction::FRem : Instruction::URem); break; }
|
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 416 // Transform "urem x, pow2" -> "and x, pow2-1".
417 if (ISDOpcode == ISD::UREM && isa<BinaryOperator>(I) &&
[all...] |
