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    Searched refs:VSELECT (Results 1 - 15 of 15) sorted by null

  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 322 /// At first, the VSELECT condition is of vXi1 type. Later, targets may
323 /// change the condition type in order to match the VSELECT node using a
325 VSELECT,
    [all...]
SelectionDAG.h 626 return getNode(Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT, DL, VT,
    [all...]
  /external/llvm/lib/Target/R600/
AMDGPUISelLowering.cpp 93 setOperationAction(ISD::VSELECT, MVT::v2f32, Expand);
94 setOperationAction(ISD::VSELECT, MVT::v4f32, Expand);
119 setOperationAction(ISD::VSELECT, VT, Expand);
  /external/llvm/lib/CodeGen/
BasicTargetTransformInfo.cpp 371 ISD = ISD::VSELECT;
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 66 // Implement vselect in terms of XOR, AND, OR when blend is not supported
219 case ISD::VSELECT:
288 else if (Node->getOpcode() == ISD::VSELECT)
574 // operands are vectors. Lower this select to VSELECT and implement it
653 // Implement VSELECT in terms of XOR, AND, OR
SelectionDAGDumper.cpp 186 case ISD::VSELECT: return "vselect";
LegalizeVectorTypes.cpp 61 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
497 case ISD::VSELECT:
    [all...]
LegalizeIntegerTypes.cpp 68 case ISD::VSELECT: Res = PromoteIntRes_VSELECT(N); break;
498 return DAG.getNode(ISD::VSELECT, SDLoc(N),
    [all...]
SelectionDAG.cpp     [all...]
SelectionDAGBuilder.cpp     [all...]
DAGCombiner.cpp     [all...]
  /external/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 74 setTargetDAGCombine(ISD::VSELECT);
509 case ISD::VSELECT:
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 431 setOperationAction(ISD::VSELECT, VT, Expand);
    [all...]
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp 125 setOperationAction(ISD::VSELECT, VT, Expand);
    [all...]

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