| /external/llvm/lib/Transforms/Instrumentation/ |
| PathProfiling.cpp | 11 // profiling converts the CFG into a DAG by replacing backedges with edges
13 // along the new DAG are enumrated, i.e. each path is given a path number.
20 // requirements are formatting the llvm CFG into the Ball-Larus DAG, path
25 // DAG - Directed Acyclic Graph.
26 // Ball-Larus DAG - A CFG with an entry node, an exit node, and backedges
30 // Ball-Larus DAG.
194 // Calculates a spanning tree of the DAG ignoring cycles. Whichever
315 BLInstrumentationDag* dag,
331 BLInstrumentationDag* dag);
335 bool splitCritical(BLInstrumentationEdge* edge, BLInstrumentationDag* dag);
1271 BLInstrumentationDag dag = BLInstrumentationDag(F); local
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineScheduler.h | 103 /// Perform platform specific DAG postprocessing.
134 VLIWMachineScheduler *DAG;
156 DAG(0), SchedModel(0), Available(ID, Name+".A"),
167 void init(VLIWMachineScheduler *dag, const TargetSchedModel *smodel) {
168 DAG = dag;
191 VLIWMachineScheduler *DAG;
207 DAG(0), SchedModel(0), Top(TopQID, "TopQ"), Bot(BotQID, "BotQ") {}
209 virtual void initialize(ScheduleDAGMI *dag);
|
| HexagonMachineScheduler.cpp | 23 /// Platform specific modifications to DAG.
142 /// only includes instructions that have DAG nodes, not scheduling boundaries.
153 // Postprocess the DAG to add platform specific artificial dependencies.
159 // Initialize the strategy before modifying the DAG.
195 void ConvergingVLIWScheduler::initialize(ScheduleDAGMI *dag) {
196 DAG = static_cast<VLIWMachineScheduler*>(dag);
197 SchedModel = DAG->getSchedModel();
199 Top.init(DAG, SchedModel);
200 Bot.init(DAG, SchedModel)
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600MachineScheduler.h | 29 const ScheduleDAGMI *DAG;
73 DAG(0), TII(0), TRI(0), MRI(0) {
79 virtual void initialize(ScheduleDAGMI *dag);
|
| R600MachineScheduler.cpp | 27 void R600SchedStrategy::initialize(ScheduleDAGMI *dag) {
29 DAG = dag;
30 TII = static_cast<const R600InstrInfo*>(DAG->TII);
31 TRI = static_cast<const R600RegisterInfo*>(DAG->TRI);
32 MRI = &DAG->MRI;
39 const AMDGPUSubtarget &ST = DAG->TM.getSubtarget<AMDGPUSubtarget>();
145 SU->dump(DAG);
148 for (unsigned i = 0; i < DAG->SUnits.size(); i++) {
149 const SUnit &S = DAG->SUnits[i]
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| Makefile | 49 $(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
|
| R600GenRegisterInfo.pl | 60 class RegSet <dag s> {
61 dag set = s;
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.h | 34 /// the DAG and must be handled explicitly by schedulers.
39 SelectionDAG *DAG; // DAG of the current basic block
51 void Run(SelectionDAG *dag, MachineBasicBlock *bb);
82 /// BuildSchedGraph - Build the SUnit graph from the selection dag that we
|
| SelectionDAGBuilder.h | 1 //===-- SelectionDAGBuilder.h - Selection-DAG building --------*- c++ -*---===//
284 SelectionDAG &DAG;
319 /// no subsequent DAG nodes should be created.
325 SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
327 : CurInst(NULL), SDNodeOrder(0), TM(dag.getTarget()),
328 DAG(dag), FuncInfo(funcinfo), OptLevel(ol),
351 /// getRoot - Return the current virtual root of the Selection DAG,
|
| LegalizeVectorOps.cpp | 36 SelectionDAG& DAG;
83 VectorLegalizer(SelectionDAG& dag) :
84 DAG(dag), TLI(dag.getTargetLoweringInfo()), Changed(false) {}
90 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
91 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I) {
113 DAG.AssignTopologicalOrder();
114 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
115 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I
[all...] |
| LegalizeTypes.h | 1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
37 SelectionDAG &DAG;
68 return TLI.getTypeAction(*DAG.getContext(), VT);
73 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
77 return TLI.getSetCCResultType(*DAG.getContext(), VT);
123 explicit DAGTypeLegalizer(SelectionDAG &dag)
124 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
131 /// top-down traversal of the dag, legalizing types as it goes. Return
[all...] |
| ScheduleDAGSDNodes.cpp | 49 : ScheduleDAG(mf), BB(0), DAG(0),
54 void ScheduleDAGSDNodes::Run(SelectionDAG *dag, MachineBasicBlock *bb) {
56 DAG = dag;
58 // Clear the scheduler's SUnit DAG.
79 const TargetLowering &TLI = DAG->getTargetLoweringInfo();
135 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG,
145 SDVTList VTList = DAG->getVTList(&VTs[0], VTs.size());
155 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size());
162 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) {
[all...] |
| LegalizeDAG.cpp | 53 SelectionDAG &DAG;
62 return TLI.getSetCCResultType(*DAG.getContext(), VT);
68 explicit SelectionDAGLegalize(SelectionDAG &DAG);
163 DAG.RemoveDeadNode(N);
169 DAG.ReplaceAllUsesWith(Old, New);
173 DAG.ReplaceAllUsesWith(Old, New);
177 DAG.ReplaceAllUsesWith(Old, New);
198 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
212 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
215 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| Makefile | 49 $(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
|
| R600GenRegisterInfo.pl | 60 class RegSet <dag s> {
61 dag set = s;
|
| /external/llvm/utils/vim/ |
| tablegen.vim | 17 syn keyword tgKeyword def let in code dag field include defm foreach
|
| /external/llvm/lib/TableGen/ |
| TGLexer.cpp | 273 .Case("dag", tgtok::Dag)
|
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 654 /// If true, the target has custom DAG combine transformations that it can
[all...] |
| /external/llvm/ |
| tblgen-rules.mk | 97 $(call transform-td-to-out,dag-isel)
|
| llvm-tblgen-rules.mk | 153 $(call transform-td-to-out,dag-isel)
|
| /ndk/sources/host-tools/nawk-20071023/ |
| FIXES | 222 dag-erling smorgrav, des@ofug.org). subject to reversion if
248 portable. thanks to dag-erling smorgrav for code.
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineScheduler.cpp | 66 // DAG subtrees must have at least this many nodes.
181 /// consistent with the DAG builder, which traverses the interior of the
184 /// This design avoids exposing scheduling boundaries to the DAG builder,
185 /// simplifying the DAG builder's support for "special" target instructions.
236 // boundary at the bottom of the region. The DAG does not include RegionEnd,
535 /// only includes instructions that have DAG nodes, not scheduling boundaries.
553 // Initialize the strategy before modifying the DAG.
561 // Initialize ready queues now that the DAG and priority data are finalized.
586 /// Build the DAG and setup three register pressure trackers.
596 // Build the DAG, and compute current register pressure
[all...] |
| /external/libpcap/ |
| configure | [all...] |
| /prebuilts/tools/common/eclipse/ |
| org.eclipse.ui.workbench.texteditor_3.6.1.r361_v20100714-0800.jar | |
