HomeSort by relevance Sort by last modified time
    Searched refs:exynosInputPort (Results 1 - 3 of 3) sorted by null

  /hardware/samsung_slsi/exynos5/exynos_omx/openmax/exynos_omx/component/video/enc/
Exynos_OMX_Venc.c 58 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
62 exynosInputPort->portDefinition.format.video.nFrameWidth) ||
64 exynosInputPort->portDefinition.format.video.nFrameHeight)) {
68 exynosInputPort->portDefinition.format.video.nFrameWidth;
70 exynosInputPort->portDefinition.format.video.nFrameHeight;
72 exynosInputPort->portDefinition.format.video.nStride;
74 exynosInputPort->portDefinition.format.video.nSliceHeight;
278 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
279 EXYNOS_OMX_DATABUFFER *inputUseBuffer = &exynosInputPort->way.port2WayDataBuffer.inputDataBuffer;
280 OMX_U32 nFrameWidth = exynosInputPort->portDefinition.format.video.nFrameWidth
    [all...]
  /hardware/samsung_slsi/exynos5/exynos_omx/openmax/exynos_omx/component/video/dec/
Exynos_OMX_Vdec.c 71 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
75 exynosInputPort->portDefinition.format.video.nFrameWidth) ||
77 exynosInputPort->portDefinition.format.video.nFrameHeight)) {
81 exynosInputPort->portDefinition.format.video.nFrameWidth;
83 exynosInputPort->portDefinition.format.video.nFrameHeight;
85 exynosInputPort->portDefinition.format.video.nStride;
87 exynosInputPort->portDefinition.format.video.nSliceHeight;
480 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
481 EXYNOS_OMX_DATABUFFER *inputUseBuffer = &exynosInputPort->way.port2WayDataBuffer.inputDataBuffer;
488 if ((exynosInputPort->bufferProcessType & BUFFER_COPY) == BUFFER_COPY)
    [all...]
  /hardware/samsung_slsi/exynos5/exynos_omx/openmax/exynos_omx/component/audio/dec/
Exynos_OMX_Adec.c 586 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
587 EXYNOS_OMX_DATABUFFER *inputUseBuffer = &exynosInputPort->way.port1WayDataBuffer.dataBuffer;
588 EXYNOS_OMX_DATA *inputData = &exynosInputPort->processData;
666 (CHECK_PORT_BEING_FLUSHED(exynosInputPort)))
765 EXYNOS_OMX_BASEPORT *exynosInputPort = &pExynosComponent->pExynosPort[INPUT_PORT_INDEX];
767 EXYNOS_OMX_DATABUFFER *inputUseBuffer = &exynosInputPort->way.port1WayDataBuffer.dataBuffer;
769 EXYNOS_OMX_DATA *inputData = &exynosInputPort->processData;
785 ((!CHECK_PORT_BEING_FLUSHED(exynosInputPort) && !CHECK_PORT_BEING_FLUSHED(exynosOutputPort)))) {
799 (exynosInputPort->portState != OMX_StateIdle) ||
810 (!CHECK_PORT_BEING_FLUSHED(exynosInputPort))) {
    [all...]

Completed in 537 milliseconds