| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 669 DAG.getCondCode(CCCode), NewLHS, NewRHS,
[all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| TargetLowering.cpp | 192 NewLHS, NewRHS, DAG.getCondCode(CCCode));
196 NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2)));
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 480 SDValue getCondCode(ISD::CondCode Cond);
615 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
636 LHS, RHS, True, False, getCondCode(Cond));
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 775 DAG.getCondCode(ISD::SETNE)
848 CC = DAG.getCondCode(ISD::getSetCCInverse(CCOpcode, CompareVT == MVT::i32));
903 DAG.getCondCode(CCOpcode));
[all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 240 A64CC::CondCodes getCondCode() const {
861 Inst.addOperand(MCOperand::CreateImm(getCondCode()));
888 unsigned Encoded = A64InvertCondCode(getCondCode());
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 535 ARMCC::CondCodes getCondCode() const {
[all...] |
