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Searched
refs:getMachineOpcode
(Results
1 - 17
of
17
) sorted by null
/external/llvm/lib/Target/R600/
AMDGPUISelDAGToDAG.cpp
179
unsigned Opcode = I->
getMachineOpcode
();
190
SelIdx = TII->getSelIdx(I->
getMachineOpcode
(), SrcIdx);
374
if (!TII->isALUInstr(Use->
getMachineOpcode
()) ||
375
(TII->get(Use->
getMachineOpcode
()).TSFlags &
380
int ImmIdx = TII->getOperandIdx(Use->
getMachineOpcode
(),
386
if (TII->getOperandIdx(Use->
getMachineOpcode
(),
425
if (Result && Result->isMachineOpcode() && Result->
getMachineOpcode
() == AMDGPU::DOT_4) {
432
IsModified = FoldDotOperands(Result->
getMachineOpcode
(), TII, Ops);
440
!(TII->get(Result->
getMachineOpcode
()).TSFlags & R600_InstFlag::VECTOR)
441
&& TII->hasInstrModifiers(Result->
getMachineOpcode
())) {
[
all
...]
SIISelLowering.cpp
645
if (Mov == 0 || !TII->isMov(Mov->
getMachineOpcode
()))
695
const MCInstrDesc &Desc = TII->get(Op->
getMachineOpcode
());
700
switch(Op.
getMachineOpcode
()) {
786
int Opcode = Node->
getMachineOpcode
();
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp
82
N->
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF))
123
const MCInstrDesc &II = TII->get(Def->
getMachineOpcode
());
298
unsigned Opc = Node->
getMachineOpcode
();
358
if (N->isMachineOpcode() && TII->get(N->
getMachineOpcode
()).isCall())
376
if (N->isMachineOpcode() && TII->get(N->
getMachineOpcode
()).isCall())
433
unsigned Opc = MainNode->
getMachineOpcode
();
448
TII->get(N->
getMachineOpcode
()).getImplicitDefs()) {
453
if (NumUsed > TII->get(N->
getMachineOpcode
()).getNumDefs())
538
unsigned POpc = Node->
getMachineOpcode
();
544
unsigned NRegDefs = SchedDAG->TII->get(Node->
getMachineOpcode
()).getNumDefs()
[
all
...]
ResourcePriorityQueue.cpp
259
switch (SU->getNode()->
getMachineOpcode
()) {
262
SU->getNode()->
getMachineOpcode
())))
299
switch (SU->getNode()->
getMachineOpcode
()) {
302
SU->getNode()->
getMachineOpcode
()));
450
const MCInstrDesc &TID = TII->get(N->
getMachineOpcode
());
553
const MCInstrDesc &TID = TII->get(N->
getMachineOpcode
());
555
if (N->
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF) {
ScheduleDAGRRList.cpp
296
unsigned Opcode = Node->
getMachineOpcode
();
424
if (N->
getMachineOpcode
() ==
427
} else if (N->
getMachineOpcode
() ==
482
if (N->
getMachineOpcode
() ==
486
} else if (N->
getMachineOpcode
() ==
552
Node->
getMachineOpcode
() == (unsigned)TII->getCallFrameDestroyOpcode()) {
757
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameSetupOpcode()) {
828
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameSetupOpcode()) {
841
SUNode->
getMachineOpcode
() == (unsigned)TII->getCallFrameDestroyOpcode()) {
[
all
...]
InstrEmitter.cpp
132
const MCInstrDesc &II = TII->get(User->
getMachineOpcode
());
211
assert(Node->
getMachineOpcode
() != TargetOpcode::IMPLICIT_DEF &&
270
Op.
getMachineOpcode
() == TargetOpcode::IMPLICIT_DEF) {
454
unsigned Opc = Node->
getMachineOpcode
();
697
unsigned Opc = Node->
getMachineOpcode
();
[
all
...]
SelectionDAGDumper.cpp
41
if (
getMachineOpcode
() < TII->getNumOpcodes())
42
return TII->getName(
getMachineOpcode
());
ScheduleDAGFast.cpp
257
const MCInstrDesc &MCID = TII->get(N->
getMachineOpcode
());
435
const MCInstrDesc &MCID = TII->get(N->
getMachineOpcode
());
513
const MCInstrDesc &MCID = TII->get(Node->
getMachineOpcode
());
/external/llvm/lib/CodeGen/
TargetInstrInfo.cpp
583
unsigned DefClass = get(DefNode->
getMachineOpcode
()).getSchedClass();
586
unsigned UseClass = get(UseNode->
getMachineOpcode
()).getSchedClass();
598
return ItinData->getStageLatency(get(N->
getMachineOpcode
()).getSchedClass());
ScheduleDAG.cpp
59
return &TII->get(Node->
getMachineOpcode
());
/external/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h
152
inline unsigned
getMachineOpcode
() const;
368
/// post-isel opcodes, see
getMachineOpcode
.
386
///
getMachineOpcode
- This may only be called if isMachineOpcode returns
389
unsigned
getMachineOpcode
() const {
862
inline unsigned SDValue::
getMachineOpcode
() const {
863
return Node->
getMachineOpcode
();
[
all
...]
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
[
all
...]
ARMISelDAGToDAG.cpp
439
const MCInstrDesc &MCID = TII->get(Use->
getMachineOpcode
());
[
all
...]
ARMISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp
[
all
...]
/external/llvm/lib/Target/X86/
X86InstrInfo.cpp
[
all
...]
X86ISelDAGToDAG.cpp
[
all
...]
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