| /external/llvm/lib/MC/ |
| MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
|
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 455 /// getMatchingSuperReg - Return a super-register of the specified register
457 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
459 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC);
[all...] |
| /external/llvm/lib/CodeGen/ |
| CalcSpillWeights.cpp | 89 return tri.getMatchingSuperReg(hreg, sub, rc);
|
| RegisterCoalescer.cpp | 284 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src));
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.cpp | 806 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,
[all...] |
| A15SDOptimizer.cpp | 152 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1,
|
| ARMBaseInstrInfo.cpp | [all...] |
| ARMExpandPseudoInsts.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| R600ControlFlowFinalizer.cpp | 125 DstMI = TRI->getMatchingSuperReg(Reg,
134 SrcMI = TRI->getMatchingSuperReg(Reg,
|
| SIISelLowering.cpp | 230 Reg = TRI->getMatchingSuperReg(Reg, AMDGPU::sub0,
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 333 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonCopyToCombine.cpp | 528 TRI->getMatchingSuperReg(LoRegDef, Hexagon::subreg_loreg,
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 263 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg(Reg, ARM::gsub_0,
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
