/external/llvm/lib/Target/MSP430/InstPrinter/ |
MSP430InstPrinter.cpp | 37 if (Op.isImm()) 51 } else if (Op.isImm()) { 79 assert(Disp.isImm() && "Expected immediate in displacement field");
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/InstPrinter/ |
AMDGPUInstPrinter.cpp | 20 } else if (Op.isImm()) {
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/external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
AMDGPUInstPrinter.cpp | 20 } else if (Op.isImm()) {
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/external/llvm/include/llvm/MC/MCParser/ |
MCParsedAsmOperand.h | 45 /// isImm - Is this an immediate operand? 46 virtual bool isImm() const = 0;
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64MCCodeEmitter.cpp | 128 assert(MO.isImm() && "Unexpected address requested"); 144 if (ImmOp.isImm()) 229 if (MO.isImm()) 263 if (MO.isImm()) 298 assert(MO.isImm() && "Only immediate expected for shift"); 308 assert(MO.isImm() && "Only immediate expected for shift"); 323 assert(MO.isImm()); 333 if (MO.isImm()) 358 } else if (MO.isImm()) { 374 if (UImm16MO.isImm()) { [all...] |
/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
PPCMCCodeEmitter.cpp | 113 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); 124 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); 136 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); 148 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); 159 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); 175 if (MO.isImm()) 193 if (MO.isImm()) 250 assert(MO.isImm() &&
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.cpp | 96 if (Imm12Op.isImm()) { 175 assert(MOImm8.isImm() 217 if (!MO.isImm()) { 246 if (MOImm.isImm()) { 262 if (Shift == A64SE::LSL && MO.isImm() && MO.getImm() == 0) 282 if (UImm16MO.isImm()) { 377 } else if (Op.isImm()) { 416 assert(MO.isImm() && 461 assert(MOUImm.isImm() && 475 assert(MOUImm8.isImm() & [all...] |
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 122 assert(Inst.getOperand(2).isImm()); 159 assert(InstIn.getOperand(2).isImm()); 161 assert(InstIn.getOperand(3).isImm()); 242 if (MO.isImm()) return MO.getImm() >> 2; 262 if (MO.isImm()) return MO.getImm()>>2; 385 } else if (MO.isImm()) { 412 assert(MI.getOperand(OpNo).isImm()); 422 assert(MI.getOperand(OpNo-1).isImm()); 423 assert(MI.getOperand(OpNo).isImm());
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/external/llvm/include/llvm/MC/ |
MCInst.h | 57 bool isImm() const { return Kind == kImmediate; } 75 assert(isImm() && "This is not an immediate"); 79 assert(isImm() && "This is not an immediate");
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/external/llvm/lib/Target/Hexagon/ |
HexagonAsmPrinter.h | 105 if (MI->getOperand(OpNo).isImm()) { 122 if (MI->getOperand(OpNo).isImm()) { 133 if (MI->getOperand(OpNo).isImm()) {
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HexagonHardwareLoops.cpp | 253 bool isImm() const { return Kind == CV_Immediate; } 264 assert(isImm() && "Wrong CountValue accessor"); 271 if (isImm()) { OS << Contents.ImmVal; } 528 if (Op2.isImm() || Op1.getReg() == IVReg) 561 assert(EndValue->isImm() && "Unrecognized latch comparison"); 569 assert(InitialValue->isImm()); 635 assert (Start->isReg() || Start->isImm()); 636 assert (End->isReg() || End->isImm()); 652 if (Start->isImm() && End->isImm()) { [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
SIMCCodeEmitter.cpp | 87 if (MO.isImm()) 155 if (Op.isImm()) 195 } else if (MO.isImm())
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86IntelInstPrinter.cpp | 121 if (Op.isImm()) 144 } else if (Op.isImm()) { 182 if (!DispSpec.isImm()) {
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X86ATTInstPrinter.cpp | 133 if (Op.isImm()) 156 } else if (Op.isImm()) { 188 if (DispSpec.isImm()) {
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/external/llvm/lib/Target/PowerPC/ |
PPCCodeEmitter.cpp | 187 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); 203 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); 216 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); 237 if (MO.isImm()) 253 if (MO.isImm()) 285 assert(MO.isImm() &&
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PPCBranchSelector.cpp | 116 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) 120 !I->getOperand(0).isImm())
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/external/llvm/lib/MC/ |
MCInst.cpp | 24 else if (isImm())
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/external/llvm/lib/Target/NVPTX/ |
NVPTXutil.cpp | 25 if (MI->getOperand(2).isImm() == false)
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/external/llvm/lib/Target/XCore/InstPrinter/ |
XCoreInstPrinter.cpp | 79 if (Op.isImm()) {
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
PPCInstPrinter.cpp | 200 if (MI->getOperand(OpNo).isImm()) 208 if (MI->getOperand(OpNo).isImm()) 216 if (!MI->getOperand(OpNo).isImm()) 227 if (!MI->getOperand(OpNo).isImm()) 311 if (Op.isImm()) {
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/external/llvm/lib/Target/Hexagon/InstPrinter/ |
HexagonInstPrinter.cpp | 97 } else if(MO.isImm()) { 110 } else if(MO.isImm()) { 199 assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand");
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/external/llvm/lib/Target/SystemZ/InstPrinter/ |
SystemZInstPrinter.cpp | 36 else if (MO.isImm()) 120 if (MO.isImm()) { 130 if (MO.isImm()) {
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/external/llvm/lib/Target/SystemZ/AsmParser/ |
SystemZAsmParser.cpp | 191 virtual bool isImm() const LLVM_OVERRIDE { 194 bool isImm(int64_t MinValue, int64_t MaxValue) const { 280 bool isU4Imm() const { return isImm(0, 15); } 281 bool isU6Imm() const { return isImm(0, 63); } 282 bool isU8Imm() const { return isImm(0, 255); } 283 bool isS8Imm() const { return isImm(-128, 127); } 284 bool isU16Imm() const { return isImm(0, 65535); } 285 bool isS16Imm() const { return isImm(-32768, 32767); } 286 bool isU32Imm() const { return isImm(0, (1LL << 32) - 1); } 287 bool isS32Imm() const { return isImm(-(1LL << 31), (1LL << 31) - 1); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.cpp | 48 return op.isImm() && op.getImm() == 0; 62 (MI->getOperand(2).isImm()) && // the imm is zero 84 (MI->getOperand(2).isImm()) && // the imm is zero
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonMCInst.cpp | 110 assert(MO.isImm() && "Extendable operand must be Immediate type");
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