/external/oprofile/module/x86/ |
op_model_athlon.c | 20 #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters.addrs[(c)], (l), (h));} while (0) 21 #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters.addrs[(c)], -(u32)(l), 0xffff);} while (0) 24 #define CTRL_READ(l, h, msrs, c) do {rdmsr(msrs->controls.addrs[(c)], (l), (h));} while (0) 25 #define CTRL_WRITE(l, h, msrs, c) do {wrmsr(msrs->controls.addrs[(c)], (l), (h));} while (0) 36 static void athlon_fill_in_addresses(struct op_msrs * const msrs) 38 msrs->counters.addrs[0] = MSR_K7_PERFCTR0 [all...] |
op_model_ppro.c | 20 #define CTR_READ(l, h, msrs, c) do {rdmsr(msrs->counters.addrs[(c)], (l), (h));} while (0) 21 #define CTR_WRITE(l, msrs, c) do {wrmsr(msrs->counters.addrs[(c)], -(u32)(l), -1);} while (0) 24 #define CTRL_READ(l, h, msrs, c) do {rdmsr((msrs->controls.addrs[(c)]), (l), (h));} while (0) 25 #define CTRL_WRITE(l, h, msrs, c) do {wrmsr((msrs->controls.addrs[(c)]), (l), (h));} while (0) 36 static void ppro_fill_in_addresses(struct op_msrs * const msrs) 38 msrs->counters.addrs[0] = MSR_P6_PERFCTR0 [all...] |
op_x86_model.h | 36 void (*fill_in_addresses)(struct op_msrs * const msrs); 37 void (*setup_ctrs)(struct op_msrs const * const msrs); 39 struct op_msrs const * const msrs, 41 void (*start)(struct op_msrs const * const msrs); 42 void (*stop)(struct op_msrs const * const msrs);
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op_model_p4.c | 404 static void p4_fill_in_addresses(struct op_msrs * const msrs) 414 msrs->counters.addrs[i] = 423 msrs->controls.addrs[i] = addr; 429 msrs->controls.addrs[i] = addr; 437 msrs->controls.addrs[i] = addr; 442 msrs->controls.addrs[i] = addr; 448 msrs->controls.addrs[i] = addr; 453 msrs->controls.addrs[i] = addr; 458 msrs->controls.addrs[i] = addr; 465 msrs->controls.addrs[i++] = MSR_P4_CRU_ESCR5 [all...] |
op_nmi.c | 49 struct op_msrs const * const msrs = &cpu_msrs[cpu]; local 51 model->check_ctrs(cpu, msrs, regs); 59 struct op_msrs const * const msrs = &cpu_msrs[cpu]; local 60 get_model()->setup_ctrs(msrs); 76 struct op_msrs const * const msrs = &cpu_msrs[cpu]; local 81 get_model()->start(msrs); 88 struct op_msrs const * const msrs = &cpu_msrs[cpu]; local 93 get_model()->stop(msrs);
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/external/qemu/target-i386/ |
kvm.c | 219 /* Obtain MSR list from KVM. These are the MSRs that we must 452 struct kvm_msr_entry *msrs = msr_data.entries; local 455 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs); 456 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp); 457 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip); 459 kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star); 460 kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc); 463 kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar); 464 kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase); 465 kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask) 584 struct kvm_msr_entry *msrs = msr_data.entries; local [all...] |
hax-windows.c | 432 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set) 447 msrs, sizeof(*msrs), 448 msrs, sizeof(*msrs), 454 msrs, sizeof(*msrs), 455 msrs, sizeof(*msrs),
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hax-all.c | 889 struct vmx_msr *msrs = md.entries; local 893 msrs[n++].entry = MSR_IA32_SYSENTER_CS; 894 msrs[n++].entry = MSR_IA32_SYSENTER_ESP; 895 msrs[n++].entry = MSR_IA32_SYSENTER_EIP; 896 msrs[n++].entry = MSR_IA32_TSC; 903 switch (msrs[i].entry) { 905 env->sysenter_cs = msrs[i].value; 908 env->sysenter_esp = msrs[i].value; 911 env->sysenter_eip = msrs[i].value; 914 env->tsc = msrs[i].value 925 struct vmx_msr *msrs; local [all...] |
hax-i386.h | 68 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set);
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hax-darwin.c | 283 int hax_sync_msr(CPUState *env, struct hax_msr_data *msrs, int set) 291 ret = ioctl(fd, HAX_VCPU_IOCTL_SET_MSRS, msrs); 293 ret = ioctl(fd, HAX_VCPU_IOCTL_GET_MSRS, msrs);
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