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  /external/clang/test/CodeGen/
atomic.c 5 int old; local
13 old = __sync_fetch_and_add(&val, 1);
16 old = __sync_fetch_and_sub(&valc, 2);
19 old = __sync_fetch_and_min(&val, 3);
22 old = __sync_fetch_and_max(&val, 4);
25 old = __sync_fetch_and_umin(&uval, 5u);
28 old = __sync_fetch_and_umax(&uval, 6u);
31 old = __sync_lock_test_and_set(&val, 7);
34 old = __sync_swap(&val, 8);
37 old = __sync_val_compare_and_swap(&val, 4, 1976)
    [all...]
  /external/e2fsprogs/lib/ext2fs/
brel.h 37 errcode_t (*put)(ext2_brel brel, blk_t old,
43 errcode_t (*get)(ext2_brel brel, blk_t old,
55 errcode_t (*next)(ext2_brel brel, blk_t *old,
62 errcode_t (*move)(ext2_brel brel, blk_t old, blk_t new);
67 errcode_t (*delete)(ext2_brel brel, blk_t old);
79 #define ext2fs_brel_put(brel, old, ent) ((brel)->put((brel), old, ent))
80 #define ext2fs_brel_get(brel, old, ent) ((brel)->get((brel), old, ent))
82 #define ext2fs_brel_next(brel, old, ent) ((brel)->next((brel), old, ent)
    [all...]
irel.h 35 errcode_t (*put)(ext2_irel irel, ext2_ino_t old,
40 errcode_t (*get)(ext2_irel irel, ext2_ino_t old,
46 errcode_t (*get_by_orig)(ext2_irel irel, ext2_ino_t orig, ext2_ino_t *old,
58 errcode_t (*next)(ext2_irel irel, ext2_ino_t *old,
86 errcode_t (*move)(ext2_irel irel, ext2_ino_t old, ext2_ino_t new);
92 errcode_t (*delete)(ext2_irel irel, ext2_ino_t old);
103 #define ext2fs_irel_put(irel, old, ent) ((irel)->put((irel), old, ent))
104 #define ext2fs_irel_get(irel, old, ent) ((irel)->get((irel), old, ent)
    [all...]
brel_ma.c 29 static errcode_t bma_put(ext2_brel brel, blk_t old,
31 static errcode_t bma_get(ext2_brel brel, blk_t old,
34 static errcode_t bma_next(ext2_brel brel, blk_t *old,
36 static errcode_t bma_move(ext2_brel brel, blk_t old, blk_t new);
37 static errcode_t bma_delete(ext2_brel brel, blk_t old);
104 static errcode_t bma_put(ext2_brel brel, blk_t old,
110 if (old > ma->max_block)
112 ma->entries[(unsigned)old] = *ent;
116 static errcode_t bma_get(ext2_brel brel, blk_t old,
122 if (old > ma->max_block
    [all...]
  /external/clang/test/SemaCXX/
constexpr-turing.cpp 19 constexpr Tape(const Tape &old, bool write) :
20 l(old.l), val(write), r(old.r) {}
21 constexpr Tape(const Tape &old, Dir dir) :
22 l(dir == L ? old.l ? old.l->l : 0 : &old),
23 val(dir == L ? old.l ? old.l->val : false
24 : old.r ? old.r->val : false)
    [all...]
  /external/compiler-rt/lib/tsan/rtl/
tsan_update_shadow_word_inl.h 21 old = LoadShadow(sp);
22 if (old.IsZero()) {
31 if (Shadow::Addr0AndSizeAreEqual(cur, old)) {
34 if (Shadow::TidsAreEqual(old, cur)) {
36 if (OldIsInSameSynchEpoch(old, thr)) {
37 if (old.IsRWNotWeaker(kAccessIsWrite, kIsAtomic)) {
46 if (old.IsRWWeakerOrEqual(kAccessIsWrite, kIsAtomic))
51 if (HappensBefore(old, thr)) {
55 if (old.IsBothReadsOrAtomic(kAccessIsWrite, kIsAtomic))
60 if (Shadow::TwoRangesIntersect(old, cur, kAccessSize))
    [all...]
  /external/chromium_org/courgette/
simple_delta.h 15 Status ApplySimpleDelta(SourceStream* old, SourceStream* delta,
18 Status GenerateSimpleDelta(SourceStream* old, SourceStream* target,
simple_delta.cc 29 Status ApplySimpleDelta(SourceStream* old, SourceStream* delta,
31 return BSDiffStatusToStatus(ApplyBinaryPatch(old, delta, target));
34 Status GenerateSimpleDelta(SourceStream* old, SourceStream* target,
36 VLOG(1) << "GenerateSimpleDelta " << old->Remaining()
38 return BSDiffStatusToStatus(CreateBinaryPatch(old, target, delta));
  /bionic/libc/arch-arm/bionic/
atomics_arm.c 61 __atomic_cmpxchg(int old, int _new, volatile int *ptr)
64 return __sync_val_compare_and_swap(ptr, old, _new) != old;
  /ndk/sources/cxx-stl/llvm-libc++/libcxx/test/depr/exception.unexpected/set.unexpected/
set_unexpected.pass.cpp 26 std::unexpected_handler old = std::set_unexpected(f1); local
28 assert(old);
33 (*old)();
get_unexpected.pass.cpp 27 std::unexpected_handler old = std::get_unexpected(); local
29 assert(old);
37 (*old)();
  /bionic/libc/kernel/arch-mips/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /development/ndk/platforms/android-9/arch-mips/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /external/kernel-headers/original/asm-mips/
cmpxchg.h 15 #define __cmpxchg_asm(ld, st, m, old, new) \
34 : "R" (*m), "Jr" (old), "Jr" (new) \
54 : "R" (*m), "Jr" (old), "Jr" (new) \
61 if (__ret == old) \
75 #define __cmpxchg(ptr, old, new, barrier) \
78 __typeof__(*(ptr)) __old = (old); \
104 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
105 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/
cmpxchg.h 24 #define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; })
25 #define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; })
26 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
27 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,
    [all...]
  /external/tcpdump/
setsignal.c 77 struct sigaction old, new; local
81 if (sigaction(sig, &new, &old) < 0)
83 return (old.sa_handler);
  /external/kernel-headers/original/asm-generic/bitops/
non-atomic.h 52 * __test_and_set_bit - Set a bit and return its old value
64 unsigned long old = *p; local
66 *p = old | mask;
67 return (old & mask) != 0;
71 * __test_and_clear_bit - Clear a bit and return its old value
83 unsigned long old = *p; local
85 *p = old & ~mask;
86 return (old & mask) != 0;
95 unsigned long old = *p; local
97 *p = old ^ mask
    [all...]
atomic.h 121 * test_and_set_bit - Set a bit and return its old value
133 unsigned long old; local
137 old = *p;
138 *p = old | mask;
141 return (old & mask) != 0;
145 * test_and_clear_bit - Clear a bit and return its old value
157 unsigned long old; local
161 old = *p;
162 *p = old & ~mask;
165 return (old & mask) != 0
180 unsigned long old; local
    [all...]
  /external/skia/bench/
bench_compare.py 14 print '-o <file> the old bench output file.'
28 print ' o: old time'
39 def __init__(self, old, new):
40 self.old = old
42 self.diff = old.time - new.time
44 if old.time != 0:
45 diffp = self.diff / old.time
51 str(self.old),
64 old = Non
    [all...]
  /frameworks/compile/mclinker/lib/LD/
StaticResolver.cpp 34 /* new\old U w_U d_U wd_U D w_D d_D wd_D C w_C, Cs, Is */
66 ResolveInfo* old = &pOld; local
81 old->overrideVisibility(pNew);
92 old->override(pNew);
97 uint32_t binding = old->binding();
98 old->override(pNew);
99 old->setBinding(binding);
100 ignore(diag::mark_dynamic_defined) << old->name();
106 old->overrideVisibility(pNew);
107 old->setDynamic()
    [all...]
  /development/ndk/platforms/android-3/include/sys/
atomics.h 50 __atomic_cmpxchg(int old, int _new, volatile int *ptr)
53 return __sync_val_compare_and_swap(ptr, old, _new) != old;

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1 2 3 4 5 6 7 8 91011>>