/external/llvm/include/llvm/Target/ |
TargetRegisterInfo.h | 221 typedef const TargetRegisterClass * const * regclass_iterator; typedef in class:llvm::TargetRegisterInfo 228 regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses 233 regclass_iterator RegClassBegin, 234 regclass_iterator RegClassEnd, 550 regclass_iterator regclass_begin() const { return RegClassBegin; } 551 regclass_iterator regclass_end() const { return RegClassEnd; } [all...] |
/external/llvm/lib/CodeGen/ |
TargetRegisterInfo.cpp | 24 regclass_iterator RCB, regclass_iterator RCE, 109 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ 139 for (TargetRegisterInfo::regclass_iterator I = regclass_begin(),
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RegisterClassInfo.cpp | 156 for (TargetRegisterInfo::regclass_iterator
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MachineLICM.cpp | 345 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), [all...] |
/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 137 typedef const MCRegisterClass *regclass_iterator; typedef in class:llvm::MCRegisterInfo 390 regclass_iterator regclass_begin() const { return Classes; } 391 regclass_iterator regclass_end() const { return Classes+NumClasses; }
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ResourcePriorityQueue.cpp | 62 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), 368 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(), 375 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
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ScheduleDAGRRList.cpp | [all...] |
TargetLowering.cpp | [all...] |