/external/llvm/include/llvm/CodeGen/ |
ValueTypes.h | 72 v8i8 = 21, // 8 x i8 enumerator in enum:llvm::MVT::SimpleValueType 204 return (SimpleTy == MVT::v8i8 || SimpleTy == MVT::v4i16 || 270 case v8i8 : 317 case v8i8 : 380 case v8i8: 495 if (NumElements == 8) return MVT::v8i8;
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/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 221 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, 222 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, 223 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, 224 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, 232 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 }, 500 { ISD::SDIV, MVT::v8i8, ReciprocalDivCost}, 501 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost}, 502 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost}, 503 { ISD::UREM, MVT::v8i8, 8 * FunctionCallDivCost},
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ARMISelDAGToDAG.cpp | [all...] |
ARMISelLowering.cpp | 458 addDRTypeForNEON(MVT::v8i8); 550 setOperationAction(ISD::SDIV, MVT::v8i8, Custom); 552 setOperationAction(ISD::UDIV, MVT::v8i8, Custom); 579 // v8i8/v16i8 vcnt instruction. 610 MVT Tys[6] = {MVT::v8i8, MVT::v4i8, MVT::v2i8, [all...] |
/external/llvm/lib/Target/X86/ |
X86TargetTransformInfo.cpp | 413 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 8 }, 426 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 }, 438 { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 1 },
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X86ISelLowering.cpp | [all...] |
/external/llvm/lib/IR/ |
ValueTypes.cpp | 139 case MVT::v8i8: return "v8i8"; 202 case MVT::v8i8: return VectorType::get(Type::getInt8Ty(Context), 8);
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/external/llvm/utils/TableGen/ |
CodeGenTarget.cpp | 80 case MVT::v8i8: return "MVT::v8i8";
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/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 60 addRegisterClass(MVT::v8i8, &AArch64::VPR64RegClass); 273 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Custom); 285 setOperationAction(ISD::SETCC, MVT::v8i8, Custom); [all...] |