| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
| intel_batchbuffer.h | 52 uint32_t write_domain,
57 uint32_t write_domain,
159 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
161 read_domains, write_domain, delta); \
163 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
165 read_domains, write_domain, delta); \
|
| intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain,
275 read_domains, write_domain);
293 uint32_t write_domain,
300 read_domains, write_domain);
|
| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| intel_batchbuffer.h | 52 uint32_t write_domain,
57 uint32_t write_domain,
159 #define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
161 read_domains, write_domain, delta); \
163 #define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
165 read_domains, write_domain, delta); \
|
| intel_batchbuffer.c | 268 uint32_t read_domains, uint32_t write_domain,
275 read_domains, write_domain);
293 uint32_t write_domain,
300 read_domains, write_domain);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/winsys/i915/drm/ |
| i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local
108 write_domain = 0;
112 write_domain = I915_GEM_DOMAIN_RENDER;
116 write_domain = I915_GEM_DOMAIN_RENDER;
120 write_domain = 0;
124 write_domain = 0;
138 write_domain);
143 write_domain);
|
| /external/mesa3d/src/gallium/winsys/i915/drm/ |
| i915_drm_batchbuffer.c | 101 unsigned write_domain = 0; local
108 write_domain = 0;
112 write_domain = I915_GEM_DOMAIN_RENDER;
116 write_domain = I915_GEM_DOMAIN_RENDER;
120 write_domain = 0;
124 write_domain = 0;
138 write_domain);
143 write_domain);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/ |
| radeon_drm_cs.h | 112 return cs->csc->relocs[index].write_domain != 0;
|
| radeon_drm_cs.c | 46 cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and
61 cs_add_reloc. The read_domain and write_domain parameters have been removed,
204 *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain);
207 reloc->write_domain |= wd;
302 reloc->write_domain = wd;
548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
|
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| radeon_drm_cs.h | 112 return cs->csc->relocs[index].write_domain != 0;
|
| radeon_drm_cs.c | 46 cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and
61 cs_add_reloc. The read_domain and write_domain parameters have been removed,
204 *added_domains = (rd | wd) & ~(reloc->read_domains | reloc->write_domain);
207 reloc->write_domain |= wd;
302 reloc->write_domain = wd;
548 if ((usage & RADEON_USAGE_WRITE) && cs->csc->relocs[index].write_domain)
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| gen6_blorp.cpp | 413 uint32_t read_domains, uint32_t write_domain)
473 read_domains, write_domain);
[all...] |
| gen7_blorp.cpp | 139 uint32_t read_domains, uint32_t write_domain,
213 read_domains, write_domain);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen6_blorp.cpp | 413 uint32_t read_domains, uint32_t write_domain)
473 read_domains, write_domain);
[all...] |
| gen7_blorp.cpp | 139 uint32_t read_domains, uint32_t write_domain,
213 read_domains, write_domain);
|
