| /external/llvm/lib/Target/X86/ |
| X86Schedule.td | 162 // cmov
|
| X86InstrInfo.td | 134 def X86cmov : SDNode<"X86ISD::CMOV", SDTX86Cmov>;
[all...] |
| X86.td | 30 def FeatureCMOV : SubtargetFeature<"cmov","HasCMov", "true",
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| X86ScheduleAtom.td | 100 // cmov
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| /external/v8/src/x64/ |
| assembler-x64.h | 458 if (f == CMOV && !FLAG_enable_cmov) return false;
514 // Safe defaults include SSE2 and CMOV for X64. It is always available, if
517 // fpu, tsc, cx8, cmov, mmx, sse, sse2, fxsr, syscall
518 static const uint64_t kDefaultCpuFeatures = (1 << SSE2 | 1 << CMOV);
[all...] |
| /external/valgrind/main/VEX/test/ |
| test-amd64.c | 279 "cmov" JCC "l %3, %0\n\t"\
282 printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
285 "cmov" JCC "w %w3, %w0\n\t"\
288 printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
[all...] |
| test-i386.c | 267 "cmov" JCC "l %3, %0\n\t"\
270 printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
273 "cmov" JCC "w %w3, %w0\n\t"\
276 printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-x86_64.pl | 350 jne .Lcmov$i # Intel cmov is sloooow...
369 jne .Lcmov$i # Intel cmov is sloooow...
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-x86_64.pl | 350 jne .Lcmov$i # Intel cmov is sloooow...
369 jne .Lcmov$i # Intel cmov is sloooow...
|
| /external/chromium_org/v8/src/ia32/ |
| code-stubs-ia32.cc | 652 if (CpuFeatures::IsSupported(CMOV)) {
653 CpuFeatureScope use_cmov(masm, CMOV);
654 __ cmov(not_equal, scratch1, result_reg);
672 if (CpuFeatures::IsSupported(CMOV)) {
673 CpuFeatureScope use_cmov(masm, CMOV);
674 __ cmov(greater, result_reg, scratch1);
[all...] |
| assembler-ia32.cc | 115 probed_features |= static_cast<uint64_t>(1) << CMOV;
654 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { function in class:v8::internal::Assembler
655 ASSERT(IsEnabled(CMOV));
[all...] |
| disasm-ia32.cc | 362 int CMov(byte* data);
671 int DisassemblerIA32::CMov(byte* data) {
[all...] |
| /external/v8/src/ia32/ |
| disasm-ia32.cc | 362 int CMov(byte* data);
669 int DisassemblerIA32::CMov(byte* data) {
1050 data += CMov(data);
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| encoder.h | 557 ENCODER_DECLARE_EXPORT char * cmov(char * stream, ConditionCode cc, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz = size_platf);
|
| /external/chromium_org/v8/src/ |
| platform-posix.cc | 85 return (one << SSE2) | (one << CMOV);
|
| v8globals.h | 427 CMOV = 15, // x86
|
| /external/llvm/include/llvm/CodeGen/ |
| Passes.h | 462 /// inserting cmov instructions.
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 65 CMOV, // ARM conditional move instructions.
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/test/CodeGen/X86/ |
| optimize-max-0.ll | 1 ; RUN: llc < %s -march=x86 | not grep cmov
|
| /external/v8/src/ |
| flag-definitions.h | 245 "enable use of CMOV instruction if available")
|
| platform-macos.cc | 286 return (one << SSE2) | (one << CMOV) | (one << RDTSC) | (one << CPUID);
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| v8globals.h | 436 CMOV = 15, // x86
|
| /external/valgrind/main/VEX/priv/ |
| host_arm_defs.h | 716 } CMov;
|
| /external/valgrind/main/exp-bbv/tests/x86-linux/ |
| ll.S | 585 .ascii "flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse syscall mmxext 3dnowext 3dnow up\n"
|
