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  /external/chromium_org/third_party/WebKit/Source/modules/webdatabase/sqlite/
SQLiteDatabase.h 66 void interrupt();
  /external/chromium_org/third_party/skia/src/gpu/
GrTexture.cpp 25 * This method allows us to interrupt the normal deletion process and place
  /external/clang/tools/driver/
cc1_main.cpp 49 // Run the interrupt handlers to make sure any special cleanups get done, in
  /external/guava/guava/src/com/google/common/util/concurrent/
JdkFutureAdapters.java 145 Thread.currentThread().interrupt();
Service.java 71 * no checked exceptions, and it cannot be {@linkplain Thread#interrupt
TimeLimiter.java 97 * interrupt status is re-asserted.
  /external/jmonkeyengine/engine/src/core/com/jme3/system/
NullContext.java 115 Thread.currentThread().interrupt();
  /external/jmonkeyengine/engine/src/networking/com/jme3/network/base/
ConnectorAdapter.java 192 interrupt(); method
  /external/kernel-headers/original/asm-arm/
locks.h 10 * Interrupt safe locking assembler.
  /external/kernel-headers/original/asm-x86/
desc_32.h 54 #define DESCTYPE_INT 0x8e /* present, system, DPL-0, interrupt gate */
semaphore_32.h 9 * SMP- and interrupt-safe semaphores..
spinlock_32.h 135 * but no interrupt writers. For those circumstances we
thread_info_32.h 155 /* work to do on interrupt/exception return */
  /external/kernel-headers/original/linux/
ftape.h 34 #include <linux/interrupt.h>
netdevice.h 560 #include <linux/interrupt.h>
670 * is executing from interrupt context.
688 * either from interrupt or non-interrupt context.
notifier.h 19 * Atomic notifier chains: Chain callbacks run in interrupt/atomic
  /external/libvpx/libvpx/examples/includes/geshi/geshi/
genero.php 180 "INTERRUPT",
pascal.php 66 'interface','interrupt','label','library','mod','name','not','of',
  /external/llvm/include/llvm/IR/
CallingConv.h 80 /// MSP430_INTR - Calling convention used for MSP430 interrupt routines.
  /external/llvm/utils/
makellvm 142 # CODE TO BE EXECUTED IF INTERRUPT IS RECEIVED
  /external/openssh/contrib/
findssl.sh 70 # Cleanup on interrupt
  /external/oprofile/doc/
oprofile.1.in 41 and uses a timer-interrupt based mechanism on CPUs without counters.
  /external/oprofile/libop/
op_cpu_type.c 31 { "CPU with timer interrupt", "timer", CPU_TIMER_INT, 1 },
  /external/oprofile/libpp/
op_header.cpp 174 str += "Profiling through timer interrupt";
  /external/qemu/
Changelog 62 - pci: interrupt disable bit support (Michael S. Tsirkin)
63 - pci: interrupt status bit implementation (Michael S. Tsirkin)
64 - pci: prepare irq code for interrupt state (Michael S. Tsirkin)
367 - CPU interrupt fixes

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