| /external/llvm/test/CodeGen/ARM/ |
| 2011-11-09-BitcastVectorDouble.ll | 7 declare <2 x i16> @foo_v2i16(<2 x i16>) nounwind
12 %2 = call <2 x i16> @foo_v2i16(<2 x i16> %1) nounwind
|
| 2012-09-25-InlineAsmScalarToVectorConv.ll | 6 define void @f() nounwind ssp {
7 %1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, ${3:q} }", "=r,=r,=r,=r,r"(i64* undef) nounwind, !srcloc !0
|
| 2012-09-25-InlineAsmScalarToVectorConv2.ll | 6 define hidden void @f(i32* %corr, i32 %order) nounwind ssp {
7 tail call void asm sideeffect "vst1.s32 { ${1:q}, ${2:q} }, [$0]", "r,{q0},{q1}"(i32* %corr, <2 x i64>* undef, <2 x i64>* undef) nounwind, !srcloc !0
|
| arm-frameaddr.ll | 6 define i8* @t() nounwind {
17 declare i8* @llvm.frameaddress(i32) nounwind readnone
|
| bicZext.ll | 5 define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp {
13 define i32 @foo32(i32 %f) nounwind readnone optsize ssp {
|
| darwin-section-order.ll | 11 define void @normal() nounwind readnone {
17 define void @special() nounwind readnone section "__TEXT,myprecious" {
|
| ehabi-unwind.ll | 7 define void @_Z1fv() nounwind {
12 define void @_Z1gv() nounwind {
|
| fold-const.ll | 3 define i32 @f(i32 %a) nounwind readnone optsize ssp {
14 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
|
| fp-arg-shuffle.ll | 5 define double @function1(double %a, double %b, double %c, double %d, double %e, double %f) nounwind noinline ssp {
7 %call = tail call double @function2(double %f, double %e, double %d, double %c, double %b, double %a) nounwind
|
| movt.ll | 4 define i32 @t(i32 %X) nounwind {
12 define i32 @t2(i32 %X) nounwind {
|
| vqadd.ll | 3 define <8 x i8> @vqadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
12 define <4 x i16> @vqadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
21 define <2 x i32> @vqadds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
30 define <1 x i64> @vqadds64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
39 define <8 x i8> @vqaddu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
48 define <4 x i16> @vqaddu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
57 define <2 x i32> @vqaddu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
66 define <1 x i64> @vqaddu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
75 define <16 x i8> @vqaddQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
84 define <8 x i16> @vqaddQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
[all...] |
| vqsub.ll | 3 define <8 x i8> @vqsubs8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
12 define <4 x i16> @vqsubs16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
21 define <2 x i32> @vqsubs32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
30 define <1 x i64> @vqsubs64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
39 define <8 x i8> @vqsubu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
48 define <4 x i16> @vqsubu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
57 define <2 x i32> @vqsubu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
66 define <1 x i64> @vqsubu64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
75 define <16 x i8> @vqsubQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
84 define <8 x i16> @vqsubQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
[all...] |
| /external/llvm/test/CodeGen/Hexagon/ |
| absimm.ll | 5 define i32 @f1(i32 %i) nounwind {
12 define i32* @f2(i32* nocapture %i) nounwind {
|
| vaddh.ll | 7 define void @foo() nounwind {
16 declare i32 @llvm.hexagon.A2.svaddh(i32, i32) nounwind readnone
|
| /external/llvm/test/CodeGen/Mips/ |
| 2008-06-05-Carry.ll | 3 define i64 @add64(i64 %u, i64 %v) nounwind {
13 define i64 @sub64(i64 %u, i64 %v) nounwind {
|
| 2008-07-07-Float2Int.ll | 3 define i32 @fptoint(float %a) nounwind {
10 define i32 @fptouint(float %a) nounwind {
|
| 2008-07-16-SignExtInReg.ll | 4 define signext i8 @A(i8 %e.0, i8 signext %sum) nounwind {
11 define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind {
|
| 2008-08-01-AsmInline.ll | 6 define i32 @A0(i32 %u, i32 %v) nounwind {
11 %asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwind
26 define void @foo0() nounwind {
31 %2 = tail call i32 asm "addu $0, $1, $2", "=r,r,r"(i32 %0, i32 %1) nounwind
36 define void @foo2() nounwind {
40 %1 = tail call float asm "neg.s $0, $1", "=f,f"(float %0) nounwind
45 define void @foo3() nounwind {
49 %1 = tail call double asm "neg.d $0, $1", "=f,f"(double %0) nounwind
|
| 2010-11-09-Mul.ll | 4 define i32 @mul1(i32 %a, i32 %b) nounwind readnone {
11 define i32 @mul2(i32 %a, i32 %b) nounwind readnone {
|
| fneg.ll | 3 define float @foo0(i32 %a, float %d) nounwind readnone {
10 define double @foo1(i32 %a, double %d) nounwind readnone {
|
| inlineasm-cnstrnt-bad-I-1.ll | 8 define i32 @main() nounwind {
12 tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,I"(i32 7, i32 1048576) nounwind
|
| inlineasm-cnstrnt-bad-J.ll | 8 define i32 @main() nounwind {
13 tail call i32 asm "addi $0,$1,$2", "=r,r,J"(i32 1024, i32 3) nounwind
|
| inlineasm-cnstrnt-bad-K.ll | 8 define i32 @main() nounwind {
13 tail call i32 asm "addu $0,$1,$2", "=r,r,K"(i32 1024, i32 1048576) nounwind
|
| inlineasm-cnstrnt-bad-L.ll | 8 define i32 @main() nounwind {
13 tail call i32 asm "addi $0,$1,$2", "=r,r,L"(i32 7, i32 1048579) nounwind
|
| inlineasm-cnstrnt-bad-N.ll | 9 define i32 @main() nounwind {
14 tail call i32 asm sideeffect "addi $0,$1,$2", "=r,r,N"(i32 7, i32 3) nounwind
|
