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  /external/llvm/lib/Target/R600/
AMDILISelLowering.cpp 103 setOperationAction(ISD::ADDC, VT, Expand);
197 setOperationAction(ISD::ADDC, MVT::Other, Expand);
  /external/llvm/lib/Target/Sparc/
SparcInstr64Bit.td 156 // Add/sub with carry were renamed to addc/subc in SPARC v9.
160 def : Pat<(addc i64:$a, i64:$b), (ADDCCrr $a, $b)>;
  /external/llvm/lib/Target/ARM/
ARMInstrThumb.td     [all...]
ARMISelLowering.h 80 ADDC, // Add with carry
ARMISelLowering.cpp 622 setTargetDAGCombine(ISD::ADDC);
667 setOperationAction(ISD::ADDC, MVT::i32, Custom);
    [all...]
  /external/valgrind/main/none/tests/ppc64/
jm-int.stdout.exp 22 addc 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
23 addc 0000000000000000, 0000001cbe991def => 0000001cbe991def (00000000 00000000)
24 addc 0000000000000000, ffffffffffffffff => ffffffffffffffff (00000000 00000000)
25 addc 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)
26 addc 0000001cbe991def, 0000001cbe991def => 000000397d323bde (00000000 00000000)
27 addc 0000001cbe991def, ffffffffffffffff => 0000001cbe991dee (00000000 20000000)
28 addc ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)
29 addc ffffffffffffffff, 0000001cbe991def => 0000001cbe991dee (00000000 20000000)
30 addc ffffffffffffffff, ffffffffffffffff => fffffffffffffffe (00000000 20000000)
221 addc. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp     [all...]
  /external/qemu/tcg/ppc/
tcg-target.c 347 #define ADDC XO31( 10)
    [all...]
  /external/antlr/antlr-3.4/runtime/C/src/
antlr3commontoken.c 582 outtext->addc (outtext, ']');
antlr3string.c 277 string->addc = addc8;
314 string->addc = addcUTF16;
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 221 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
Mips16InstrInfo.td     [all...]
MipsInstrInfo.td     [all...]
  /external/llvm/lib/Target/NVPTX/
NVPTXVector.td 320 def AddCCV4I32 : VecBinaryOp<V4AsmStr<"add.cc.s32">, addc, V4I32Regs,
322 def AddCCV2I32 : VecBinaryOp<V2AsmStr<"add.cc.s32">, addc, V2I32Regs,
328 def AddCCCV4I32 : VecBinaryOp<V4AsmStr<"addc.cc.s32">, adde, V4I32Regs,
330 def AddCCCV2I32 : VecBinaryOp<V2AsmStr<"addc.cc.s32">, adde, V2I32Regs,
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDILISelLowering.cpp 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
  /external/mesa3d/src/gallium/drivers/radeon/
AMDILISelLowering.cpp 114 setOperationAction(ISD::ADDC, VT, Expand);
214 setOperationAction(ISD::ADDC, MVT::Other, Expand);
  /external/llvm/lib/Target/PowerPC/
PPCInstr64Bit.td 418 "addc", "$rT, $rA, $rB", IntGeneral,
419 [(set i64:$rT, (addc i64:$rA, i64:$rB))]>,
424 [(set i64:$rD, (addc i64:$rA, imm64SExt16:$imm))]>;
    [all...]
  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 188 /// like ADDC/SUBC, which indicate the carry result is always false.
195 ADDC, SUBC,
    [all...]
  /external/chromium_org/third_party/skia/src/core/
SkPath.cpp 798 SkAutoDisableDirectionCheck addc(this);
    [all...]
  /external/skia/src/core/
SkPath.cpp 798 SkAutoDisableDirectionCheck addc(this);
    [all...]
  /external/valgrind/main/VEX/switchback/
test_ppc_jm1.c 728 __asm__ __volatile__ ("addc 17, 14, 15");
819 { &test_addc , " addc", },
852 __asm__ __volatile__ ("addc. 17, 14, 15");
923 { &test_addc_ , " addc.", },
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
ppc64-mont.pl 839 addc $t3,$t0,$t1
909 addc $t3,$t0,$t1
  /external/llvm/include/llvm/Target/
TargetSelectionDAG.td 341 def addc : SDNode<"ISD::ADDC" , SDTIntBinOp,
    [all...]
  /external/opencv/cxcore/src/
cxarithm.cpp 244 ICV_DEF_UN_ARI_ALL( CV_ADD, AddC )
262 ICV_DEF_INIT_ARITHM_FUNC_TAB( AddC, C1R )
    [all...]

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