/external/openssl/crypto/bn/asm/ |
ppc64-mont.pl | 839 addc $t3,$t0,$t1 909 addc $t3,$t0,$t1
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGRRList.cpp | 514 /// flags = (2) addc flags 515 /// flags = (1) addc flags 522 /// If (2) addc is unscheduled, then (1) addc must also be unscheduled to avoid [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.td | [all...] |
README.txt | 51 addc r3,r3,r4
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/external/chromium_org/third_party/icu/source/data/unidata/ |
GraphemeBreakProperty.txt | 453 ADDC ; LV
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LineBreak.txt | 1170 ADDC;H2
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NormalizationTest.txt | [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | [all...] |
SelectionDAGNodes.h | 86 /// from loads (which define a token and a return value) to ADDC (which returns [all...] |
/external/llvm/lib/Target/Mips/ |
MipsDSPInstrInfo.td | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.td | 458 defm ADDCC : F3_12<"addcc", 0b010000, addc>; [all...] |
/external/qemu/tcg/ppc64/ |
tcg-target.c | 337 #define ADDC XO31( 10) [all...] |
/external/valgrind/main/none/tests/ppc32/ |
jm-insns.c | 456 __asm__ __volatile__ ("addc 17, 14, 15"); 554 { &test_addc , " addc", }, 590 __asm__ __volatile__ ("addc. 17, 14, 15"); 688 { &test_addc_ , " addc.", }, [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.td | 427 defm ADDSxx :addsub_exts<0b1, 0b0, 0b1, "adds\t$Rd, ", SetRD<GPR64, addc>, 429 addsub_xxtx< 0b0, 0b1, "adds\t$Rd, ", SetRD<GPR64, addc>, 431 defm ADDSww :addsub_exts<0b0, 0b0, 0b1, "adds\t$Rd, ", SetRD<GPR32, addc>, 655 [(set Ty:$Rd, (addc Ty:$Rn, imm_operand:$Imm12))], [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
nv50_ir_emit_nv50.cpp | 939 // addc == sub | subr [all...] |
/external/llvm/lib/CodeGen/ |
IfConversion.cpp | 701 // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are [all...] |
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_emit_nv50.cpp | 939 // addc == sub | subr [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXInstrInfo.td | 399 defm ADDCC : ADD_SUB_INT_32<"add.cc", addc>; 402 defm ADDCCC : ADD_SUB_INT_32<"addc.cc", adde>; [all...] |
NVPTXISelLowering.cpp | 207 setOperationAction(ISD::ADDC, MVT::i64, Expand); [all...] |
/external/harfbuzz/contrib/tables/ |
GraphemeBreakProperty.txt | 377 ADDC ; LV # Lo HANGUL SYLLABLE GYU [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 91 setOperationAction(ISD::ADDC, MVT::i32, Expand); [all...] |
/external/qemu/ |
ppc-dis.c | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 316 case ISD::ADDC: [all...] |
/external/chromium_org/third_party/icu/source/test/testdata/ |
NormalizationTest-3.2.0.txt | [all...] |