/external/llvm/lib/Target/Mips/ |
MipsLongBranch.cpp | 273 // addiu $sp, $sp, -8 278 // addiu $at, $at, %lo($tgt - $baltgt) 282 // addiu $sp, $sp, 8 288 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) 299 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::AT) 308 .append(BuildMI(*MF, DL, TII->get(Mips::ADDiu), Mips::SP) 401 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0)
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MipsSEInstrInfo.cpp | 320 unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu; 323 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); 353 // instructions (ADDiu, ORI and SLL) in that it does not have a register
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Mips16InstrInfo.td | 487 // Format: ADDIU rx, immediate MIPS16e 491 def AddiuRxImmX16: FEXT_RI16_ins<0b01001, "addiu", IIAlu>; 493 def AddiuRxRxImm16: F2RI16_ins<0b01001, "addiu", IIAlu>, 497 def AddiuRxRxImmX16: FEXT_2RI16_ins<0b01001, "addiu", IIAlu>, 503 FEXT_RRI_A16_mem_ins<0, "addiu", mem16_ea, IIAlu>; 507 // Format: ADDIU rx, pc, immediate MIPS16e 511 def AddiuRxPcImmX16: FEXT_RI16_PC_ins<0b00001, "addiu", IIAlu>; 514 // Format: ADDIU sp, immediate MIPS16e 519 : FI816_SP_ins<0b011, "addiu", IIAlu> { 526 : FEXT_I816_SP_ins<0b011, "addiu", IIAlu> [all...] |
/bionic/libc/kernel/arch-mips/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 110 #define INT_ADDIU addiu 150 #define LONG_ADDIU addiu 200 #define PTR_ADDIU addiu
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/bionic/libc/arch-mips/bionic/ |
crtbegin.c | 82 " addiu $sp, $sp, (-32) \n"
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/bionic/linker/arch/mips/ |
begin.S | 96 addiu $sp, -4*4 /* space for arg saves in linker_init */
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/development/ndk/platforms/android-9/arch-mips/src/ |
crtbegin.c | 100 " addiu $sp, $sp, (-32) \n"
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/external/llvm/test/CodeGen/Mips/ |
largefr1.ll | 39 ; 1: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
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mips16_32_3.ll | 62 ; 32: addiu $2, $zero, 0
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brdelayslot.ll | 135 ; SUCCBB-NEXT: addiu 137 ; SUCCBB-NEXT: addiu
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/external/llvm/test/MC/Mips/ |
mips64-register-names.s | 4 # Second byte of addiu with $zero at rt contains the number of the source
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/system/core/libpixelflinger/codeflinger/ |
MIPSAssembler.cpp | 166 mMips->ADDIU(R_sp, R_sp, -(5 * 4)); 184 mMips->ADDIU(R_sp, R_sp, (5 * 4)); 446 mMips->ADDIU(Rd, Rn, src); 784 mMips->ADDIU(Rn, Rn, amode.value); 792 mMips->ADDIU(Rn, Rn, amode.value); 815 mMips->ADDIU(Rn, Rn, amode.value); 820 mMips->ADDIU(Rn, Rn, amode.value); 848 mMips->ADDIU(Rn, Rn, amode.value); 857 mMips->ADDIU(Rn, Rn, amode.value); // post index always writes back 880 mMips->ADDIU(Rn, Rn, amode.value) [all...] |
/external/v8/src/mips/ |
macro-assembler-mips.cc | 548 addiu(rd, rs, rt.imm32_); 564 addiu(rd, rs, -rt.imm32_); // No subiu instr, use addiu(x, y, -imm). 779 addiu(rd, zero_reg, j.imm32_); 837 addiu(sp, sp, stack_offset); 850 addiu(sp, sp, stack_offset); 894 addiu(sp, sp, stack_offset); 908 addiu(sp, sp, stack_offset); [all...] |
regexp-macro-assembler-mips.cc | 257 __ addiu(a0, a0, char_size()); 262 __ addiu(a0, a0, char_size()); 326 __ addiu(a0, a0, char_size()); 328 __ addiu(a2, a2, char_size()); 428 __ addiu(a0, a0, char_size()); 430 __ addiu(a2, a2, char_size()); 434 __ addiu(a0, a0, char_size()); 436 __ addiu(a2, a2, char_size()); [all...] |
/external/chromium_org/v8/src/mips/ |
macro-assembler-mips.cc | 568 addiu(rd, rs, rt.imm32_); 584 addiu(rd, rs, -rt.imm32_); // No subiu instr, use addiu(x, y, -imm). 817 addiu(rd, zero_reg, j.imm32_); 875 addiu(sp, sp, stack_offset); 888 addiu(sp, sp, stack_offset); 929 addiu(sp, sp, stack_offset); 942 addiu(sp, sp, stack_offset); [all...] |
/external/chromium_org/v8/test/cctest/ |
test-assembler-mips.cc | 91 __ addiu(a1, a1, -1); 126 // Test lui, ori, and addiu, used in the li pseudo-instruction. 134 __ addiu(t1, t0, 1); 135 __ addiu(t2, t1, -0x10); 183 __ addiu(v0, zero_reg, 0x7421); // 0x00007421 184 __ addiu(v0, v0, -0x1); // 0x00007420 185 __ addiu(v0, v0, -0x20); // 0x00007400 188 __ addiu(v1, t3, 0x1); // 0x80000000 [all...] |
/external/v8/test/cctest/ |
test-assembler-mips.cc | 102 __ addiu(a1, a1, -1); 136 // Test lui, ori, and addiu, used in the li pseudo-instruction. 144 __ addiu(t1, t0, 1); 145 __ addiu(t2, t1, -0x10); 193 __ addiu(v0, zero_reg, 0x7421); // 0x00007421 194 __ addiu(v0, v0, -0x1); // 0x00007420 195 __ addiu(v0, v0, -0x20); // 0x00007400 198 __ addiu(v1, t3, 0x1); // 0x80000000 [all...] |
/system/core/libcorkscrew/arch-mips/ |
backtrace-mips.c | 103 case 0x27bd0000: // addiu sp, imm
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/external/valgrind/main/VEX/priv/ |
host_mips_defs.c | 1047 ret = immR ? "addiu" : "addu"; [all...] |