/external/llvm/test/MC/Disassembler/ARM/ |
thumb-printf.txt | 18 # CHECK-NEXT: blx #191548
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/external/v8/src/arm/ |
debug-arm.cc | 53 // blx ip 63 patcher.masm()->blx(v8::internal::ip); 104 // blx ip 113 patcher.masm()->blx(v8::internal::ip);
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assembler-arm-inl.h | 209 // blx ip 345 // If we have a blx instruction, the instruction before it is
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assembler-arm.h | 710 // blx ip 726 // blx ip 740 // blx ip 771 void blx(int branch_offset); // v5 and above 772 void blx(Register target, Condition cond = al); // v5 and above 782 void blx(Label* L) { blx(branch_offset(L, false)); } // v5 and above function in class:v8::internal::Assembler [all...] |
/frameworks/compile/mclinker/lib/Target/ARM/ |
ARMFixupKinds.h | 62 // fixup_arm_thumb_blx - Fixup for Thumb BLX instructions.
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ARMToTHMStub.cpp | 75 // FIXME: Assuming blx is available (i.e., target is armv5 or above!)
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THMToARMStub.cpp | 75 // FIXME: Assuming blx is available (i.e., target is armv5 or above!)
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ARMRelocator.cpp | [all...] |
/sdk/emulator/qtools/ |
bbprof.cpp | 152 // thumb instructions (BL or BLX). 156 // it for the case where insn is BL or BLX.
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thumbdis.cpp | 78 %B print arm BLX(1) destination 106 {0x4780, 0xff87, OP_THUMB_BLX, "blx\t%3-6r"}, /* note: 4 bit register number. */ 187 {0xE800, 0xF800, OP_THUMB_BLX, "second half of BLX instruction %0-15x"}, 265 // If "insn1" is a BL or BLX instruction that is the first of two Thumb 294 len = sprintf(ptr, "blx\t");
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/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-armv5te-vfp.S | 174 blx ip 218 blx r2 @ exit the interpreter 276 blx ip 334 blx ip 457 blx ip 461 blx r8 @ off to the native code 467 blx ip [all...] |
/external/chromium_org/v8/src/arm/ |
assembler-arm-inl.h | 280 // blx ip 425 // blx ip 429 // blx ip
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMachObjectWriter.cpp | 332 // ARM BL/BLX has a 25-bit offset. 338 // Thumb BL/BLX has a 24-bit offset. 341 // BL/BLX also use external relocations when an internal relocation
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/art/runtime/arch/arm/ |
quick_entrypoints_arm.S | 283 blx ip @ call the method [all...] |
/external/valgrind/main/coregrind/m_dispatch/ |
dispatch-arm-linux.S | 130 4 = blx r12 */ 145 4 = blx r12 */
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/external/llvm/test/CodeGen/ARM/ |
2011-06-09-TailCallByVal.ll | 32 ; CHECK: blx _fnmatch1
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crash-greedy.ll | 33 ; CHECK: blx _exp
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/external/llvm/test/CodeGen/Thumb2/ |
2010-03-15-AsmCCClobber.ll | 17 ; CHECK: blx _f2
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/external/llvm/test/MC/MachO/ARM/ |
darwin-Thumb-reloc.s | 13 blx _printf
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/art/compiler/dex/quick/arm/ |
arm_lir.h | 260 kThumbBlx1, // blx(1) [111] H[10] offset_11[10..0]. 261 kThumbBlx2, // blx(1) [111] H[01] offset_11[10..0]. 262 kThumbBl1, // blx(1) [111] H[10] offset_11[10..0]. 263 kThumbBl2, // blx(1) [111] H[11] offset_11[10..0]. 264 kThumbBlxR, // blx(2) [010001111] rm[6..3] [000].
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/dalvik/vm/arch/arm/ |
CallOldABI.S | 152 blx ip
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/external/libffi/src/arm/ |
sysv.S | 76 # define call_reg(x) blx x
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/external/llvm/test/CodeGen/Thumb/ |
2010-07-15-debugOrdering.ll | 11 ; CHECK: blx ___muldf3 12 ; CHECK: blx ___muldf3 14 ; CHECK: blx ___muldf3
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/frameworks/rs/cpu_ref/linkloader/include/impl/ |
ELFObject.hxx | 262 P &= ~0x3; // Base address align to 4 bytes. (For BLX.) 273 // Rewrite instruction to BLX. (Stub is always ARM.) 279 // For BLX, bit [0] is 0.
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/system/core/libcorkscrew/arch-arm/ |
backtrace-arm.c | 455 * arm blx in the middle of thumb: 457 * 187b0: f7fe ee1c blx 173ec 467 * 18896: 4798 blx r3
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