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  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/
lp_texture.c 974 uint alignment = MAX2(16, util_cpu_caps.cacheline);
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  /external/mesa3d/src/gallium/drivers/llvmpipe/
lp_texture.c 974 uint alignment = MAX2(16, util_cpu_caps.cacheline);
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  /external/oprofile/events/ppc64/power6/
events     [all...]
  /external/llvm/lib/Target/X86/
README.txt 435 Make sure the instruction which starts a loop does not cross a cacheline
439 In the new trace, the hot loop has an instruction which crosses a cacheline
442 to grab the bytes from the next cacheline.
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  /external/oprofile/events/i386/nehalem/
unit_masks 184 0x02 l1d Counts the number of cycles that cacheline in the L1 data cache unit is locked
  /external/valgrind/main/callgrind/
sim.c 73 Bool sectored; /* prefetch nearside cacheline on read */
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  /external/oprofile/events/ppc64/power7/
events     [all...]
  /libcore/luni/src/main/java/java/util/concurrent/
ForkJoinPool.java     [all...]
  /external/valgrind/main/drd/tests/
tsan_unittest.cpp     [all...]
  /external/valgrind/unittest/
racecheck_unittest.cc     [all...]

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