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  /external/chromium_org/media/cast/rtp_receiver/
receiver_stats.cc 63 // number of cycles (wrap).
  /external/chromium_org/net/url_request/
url_request_context_storage.h 72 // We use a raw pointer to prevent reference cycles, since
  /external/chromium_org/ppapi/api/
ppb_messaging.idl 39 * graph will be converted and transferred. If the reference graph has cycles,
  /external/chromium_org/ppapi/c/
ppp_messaging.h 56 * graph has cycles, the message will not be sent and an error will be logged
  /external/chromium_org/sync/engine/
all_status.h 35 // need to debug slow or stuck sync cycles.
  /external/chromium_org/sync/internal_api/public/engine/
sync_status.h 72 // Count of sync cycles that successfully committed items;
  /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
sha256-armv4.pl 13 # lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
19 # Cortex A8 core and ~20 cycles per processed byte.
24 # improvement on Cortex A8 core and ~17 cycles per processed byte.
  /external/chromium_org/third_party/sqlite/src/test/
thread2.test 117 # locks and eating away CPU cycles.
  /external/chromium_org/tools/perf/measurements/
tab_switching.py 8 it cycles through each tab in sequence, and records a histogram of the time
  /external/chromium_org/v8/tools/
run-llprof.sh 69 perf record -R -e cycles -c $SAMPLE_EVERY_N_CYCLES -f -i $@ --ll-prof
  /external/linux-tools-perf/Documentation/
perf-annotate.txt 67 samples, TAB/UNTAB cycles through the lines with more samples.
  /external/llvm/test/Analysis/BasicAA/
dag.ll 5 ; BasicAA's guard against use-def cycles shouldn't prevent it from
  /external/llvm/test/CodeGen/PowerPC/
misched-inorder-latency.ll 34 ; The prefetch gets a default latency of 3 cycles and should be hoisted
  /external/openfst/src/include/fst/
topsort.h 45 // no cycles.
  /external/openssl/crypto/sha/asm/
sha256-armv4.pl 13 # lute" terms is ~2250 cycles per 64-byte block or ~35 cycles per
19 # Cortex A8 core and ~20 cycles per processed byte.
24 # improvement on Cortex A8 core and ~17 cycles per processed byte.
  /external/srec/tools/thirdparty/OpenFst/fst/lib/
properties.h 99 // FST has cycles
101 // FST has no cycles
104 // FST has cycles containing the initial state
106 // FST has no cycles containing the initial state
topsort.h 40 // no cycles.
  /external/aac/libFDK/src/
dct.cpp 166 /* ARM926: 12 cycles per 2-iteration, no overhead code by compiler */
320 /* ARM926: 44 cycles for 2 iterations = 22 cycles/iteration */
329 /* 29 cycles on ARM926 */
359 /* ARM926: 42 cycles for 2 iterations = 21 cycles/iteration */
377 /* 28 cycles for ARM926 */
455 /* 34 cycles on ARM926 */
  /external/ceres-solver/internal/ceres/
collections_port.h 90 // in 18 cycles if you're lucky. On x86 architectures, this requires 45
91 // instructions in 27 cycles, if you're lucky.
  /external/chromium_org/sync/sessions/
sync_session.h 8 // sync cycles; each cycle starts with a new one.
89 // sync cycles.
  /external/dropbear/libtomcrypt/notes/
tech0004.txt 67 This PRNG is extremely fast [4 cycles/byte on a P4] and was designed by a well known cryptographer [Greg Rose].
89 [by about 10 cycles/byte on a P4] I'd use Fortuna anyways...
  /external/kernel-headers/original/asm-mips/
hazards.h 165 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
166 * for data translations should not occur for 3 cpu cycles.
  /external/llvm/include/llvm/CodeGen/
ScheduleDFS.h 38 /// and cycles or nodes depending on context.
181 /// For bottom-up trees, the connection level is the latency depth (in cycles)
  /external/llvm/include/llvm/MC/
MCSubtargetInfo.h 42 const unsigned *OperandCycles; // Itinerary operand cycles
123 return I->Cycles;
  /external/oprofile/events/i386/p4/
events 24 event:0x1c counters:3,7 um:machine_clear minimum:3000 name:MACHINE_CLEAR : cycles with entire machine pipeline cleared
32 event:0x03 counters:1,5 um:tc_deliver_mode minimum:3000 name:TC_DELIVER_MODE : duration (in clock cycles) in the trace cache and decode engine

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