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  /external/llvm/test/CodeGen/X86/
multiple-loop-post-inc.ll 44 %13 = fadd float %x.0, %0 ; <float> [#uses=1]
69 %22 = fadd float %21, %x.0 ; <float> [#uses=1]
70 %23 = fadd float %x.0, %0 ; <float> [#uses=1]
72 %25 = fadd float %24, %x.0 ; <float> [#uses=1]
74 %27 = fadd float %26, %x.0 ; <float> [#uses=1]
80 %32 = fadd <4 x float> %31, %asmtmp.i ; <<4 x float>> [#uses=3]
81 %33 = fadd <4 x float> %32, %asmtmp.i ; <<4 x float>> [#uses=3]
82 %34 = fadd <4 x float> %33, %asmtmp.i ; <<4 x float>> [#uses=2]
135 %41 = fadd <4 x float> %vX0.039, %asmtmp.i18 ; <<4 x float>> [#uses=2]
143 %45 = fadd <4 x float> %vX3.041, %asmtmp.i18 ; <<4 x float>> [#uses=1
    [all...]
2008-07-19-movups-spills.ll     [all...]
avx-logic.ll 11 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
22 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
53 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
64 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
95 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
106 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
138 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
152 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
fast-isel-store.ll 53 %foo = fadd <2 x double> %value, %value2 ; to force dobule type on store
61 %foo = fadd <2 x double> %value, %value2 ; to force dobule type on store
fma_patterns_wide.ll 15 %res = fadd <16 x float> %x, %a2
68 %res = fadd <8 x double> %x, %a2
  /external/llvm/test/CodeGen/ARM/
coalesce-subregs.ll 98 %add = fadd float %1, %2
135 %add = fadd float %1, %2
162 %add = fadd float %vecext3, 1.000000e+00
169 %add4 = fadd float %vecext, %1
171 %add6 = fadd float %vecext1, %2
174 %add8 = fadd float %vecext2, %3
210 %add = fadd double 1.0, %2
340 %add42 = fadd <2 x double> undef, %mul41
343 %add46 = fadd <2 x double> undef, %mul45
350 %add58 = fadd <2 x double> undef, %
    [all...]
fparith.ll 7 %tmp = fadd float %a, %b ; <float> [#uses=1]
15 %tmp = fadd double %a, %b ; <double> [#uses=1]
neon_spill.ll 37 %8 = fadd float undef, -1.000000e+05
41 %11 = fadd float %10, -1.000000e+05
fp16.ll 22 %4 = fadd float %2, %3
ifcvt10.ll 29 %add112 = fadd double %tmp101, undef
widen-vmovs.ll 29 %add.i = fadd float %tmp3.i, 1.000000e+10
  /external/llvm/test/Analysis/ScalarEvolution/
trip-count5.ll 26 %tmp10 = fadd float %tmp8, %distERBhi.036 ; <float> [#uses=3]
31 %tmp19 = fadd float %tmp17, %peakCount.034 ; <float> [#uses=2]
  /external/llvm/test/CodeGen/Mips/
fcopysign-f32-f64.ll 24 %add = fadd float %d, 1.000000e+00
48 %add = fadd double %d, 1.000000e+00
return-vector.ll 54 %add1 = fadd float %v0, %v1
55 %add2 = fadd float %v2, %v3
56 %add3 = fadd float %add1, %add2
76 %add1 = fadd double %v0, %v1
77 %add2 = fadd double %v2, %v3
78 %add3 = fadd double %add1, %add2
126 %add1 = fadd float %v0, %v1
141 %add1 = fadd double %v0, %v1
  /external/llvm/test/CodeGen/NVPTX/
arithmetic-fp-sm20.ll 14 %ret = fadd double %a, %b
47 %ret = fadd float %a, %b
  /external/llvm/test/CodeGen/PowerPC/
unal-altivec.ll 18 %4 = fadd <4 x float> %wide.load, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
19 %5 = fadd <4 x float> %wide.load8, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
  /external/llvm/test/CodeGen/R600/
llvm.AMDGPU.cube.ll 34 %23 = fadd float %22, 1.500000e+00
36 %25 = fadd float %24, 1.500000e+00
  /external/llvm/test/CodeGen/Thumb2/
2010-06-14-NEONCoalescer.ll 30 %5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2]
31 %6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2]
  /external/llvm/test/Transforms/InstCombine/
fold-fops-into-selects.ll 15 %op = fadd float 2.000000e+00, %cf
18 ; CHECK: [[OP:%.*]] = fadd float %B, 2.000000e+00
  /external/llvm/test/Transforms/LoopSimplify/
merge-exits.ll 21 %t4 = fadd float %t3, %distERBhi.0 ; <float> [#uses=1]
26 %t9 = fadd float %t8, %peakCount.0 ; <float> [#uses=1]
  /external/llvm/test/Transforms/LoopVectorize/
cpp-new-array.ll 9 ;CHECK: fadd <4 x float>
32 %add = fadd float %3, %4
safegep.ll 24 %D.1399_17 = fadd float %D.1398_15, %K
50 %D.1399_17 = fadd float %D.1398_15, %K
  /external/llvm/test/Transforms/SLPVectorizer/X86/
reduction.ll 33 %add5 = fadd double %mul1, %mul4
34 %add6 = fadd double %sum.014, %add5
  /dalvik/dx/tests/102-verify-nonwide-math/
expected.txt 8 fadd: expected failure occurred
  /external/llvm/test/Bitcode/
function-encoding-rel-operands.ll 28 %2 = fadd double %1, %1

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