/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
options.h | [all...] |
rtl.h | 752 /* ACCESS MACROS for particular fields of insns. */ 758 /* Chain insns together in sequence. */ [all...] |
/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Analysis/ |
MethodAnalyzer.java | 482 Instruction[] insns = encodedMethod.codeItem.getInstructions(); local 484 instructions = new SparseArray<AnalyzedInstruction>(insns.length); 488 for (int i=0; i<insns.length; i++) { 489 instructions.append(currentCodeAddress, new AnalyzedInstruction(insns[i], i, registerCount)); 491 currentCodeAddress += insns[i].getSize(currentCodeAddress); 501 AnalyzedInstruction[][] exceptionHandlers = new AnalyzedInstruction[insns.length][]; 541 BitSet instructionsToProcess = new BitSet(insns.length); [all...] |
/dalvik/vm/ |
Jni.cpp | 803 * Point "method->nativeFunc" at the JNI bridge, and overload "method->insns" [all...] |
Sync.cpp | 315 relativePc = saveArea->xtra.currentPc - saveArea->method->insns; 406 mon->ownerPc = (saveArea->xtra.currentPc - saveArea->method->insns); [all...] |
/prebuilts/gcc/darwin-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
rtl.h | 752 /* ACCESS MACROS for particular fields of insns. */ 758 /* Chain insns together in sequence. */ [all...] |
/prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
rtl.h | 752 /* ACCESS MACROS for particular fields of insns. */ 758 /* Chain insns together in sequence. */ [all...] |
/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
rtl.h | 752 /* ACCESS MACROS for particular fields of insns. */ 758 /* Chain insns together in sequence. */ [all...] |
/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/libexec/gcc/i686-linux/4.4.3/ |
cc1plus | |
/dalvik/vm/alloc/ |
Copying.cpp | [all...] |
/external/qemu/ |
trace.c | 65 uint32_t insns[kMaxInsnPerBB]; member in struct:TraceStatic 591 trace_static.insns[trace_static.next_insn++] = insn; 613 insn = hostToLE32(trace_static.insns[ii]); [all...] |
elf.h | 861 #define PF_IA_64_NORECOV 0x80000000 /* spec insns w/o recovery */ [all...] |
/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 576 lw rPC, offMethod_insns(a0) # rPC<- methodToCall->insns 665 lw rPC, offMethod_insns(a0) # rPC<- methodToCall->insns 788 lw rPC, offMethod_insns(a0) # rPC<- methodToCall->insns [all...] |
CompilerTemplateAsm-armv5te.S | 247 ldr rPC, [r0, #offMethod_insns] @ rPC<- methodToCall->insns [all...] |
/external/chromium_org/third_party/skia/src/opts/ |
SkBlitRow_opts_arm_neon.cpp | [all...] |
/external/skia/src/opts/ |
SkBlitRow_opts_arm_neon.cpp | [all...] |
/external/valgrind/main/none/tests/ppc32/ |
test_dfp3.c | [all...] |
/external/valgrind/main/none/tests/ppc64/ |
test_dfp3.c | [all...] |
/art/test/ReferenceMap/ |
stack_walk_refmap_jni.cc | 168 // insns size : 51 16-bit code units
|
/external/oprofile/events/i386/core_2/ |
events | 17 event:0x07 counters:0,1 um:sse_prefetch minimum:500 name:SSE_PRE_EXEC : number of SSE pre-fetch/weakly ordered insns retired
|
/external/valgrind/main/VEX/priv/ |
host_amd64_defs.h | 550 /* A very minimal set of x87 insns, that operate exactly in a
|
host_x86_defs.h | 529 /* X86 Floating point (fake 3-operand, "flat reg file" insns) */
|
host_mips_isel.c | 86 - The code array, that is, the insns selected so far. 90 - The host subarchitecture we are selecting insns for. 504 /* None of these insns, including any spill code that might 537 expression, possibly also adding insns to the code list as a 609 /* Select insns for an integer-typed expression, and add them to the [all...] |
guest_amd64_toIR.c | 129 /* casLE (implementation of lock-prefixed insns) and rep-prefixed 130 insns: the side-exit back to the start of the insn is done with [all...] |
guest_x86_toIR.c | 99 casLE (implementation of lock-prefixed insns) and rep-prefixed 100 insns: the side-exit back to the start of the insn is done with [all...] |