| /external/llvm/lib/Target/XCore/ | 
| README.txt | 4 * Instruction encodings 
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| /art/compiler/dex/ | 
| local_value_numbering.cc | 26     case Instruction::NOP: 27     case Instruction::RETURN_VOID:
 28     case Instruction::RETURN:
 29     case Instruction::RETURN_OBJECT:
 30     case Instruction::RETURN_WIDE:
 31     case Instruction::MONITOR_ENTER:
 32     case Instruction::MONITOR_EXIT:
 33     case Instruction::GOTO:
 34     case Instruction::GOTO_16:
 35     case Instruction::GOTO_32
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| dex_to_dex_compiler.cc | 66   void CompileReturnVoid(Instruction* inst, uint32_t dex_pc); 69   // this case, returns the second NOP instruction pointer. Otherwise, returns
 71   Instruction* CompileCheckCast(Instruction* inst, uint32_t dex_pc);
 79   void CompileInstanceFieldAccess(Instruction* inst, uint32_t dex_pc,
 80                                   Instruction::Code new_opcode, bool is_put);
 88   void CompileInvokeVirtual(Instruction* inst, uint32_t dex_pc,
 89                             Instruction::Code new_opcode, bool is_range);
 103   Instruction* inst = const_cast<Instruction*>(Instruction::At(insns))
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| /external/llvm/lib/Transforms/InstCombine/ | 
| InstCombine.h | 43   if (isa<Instruction>(V)) { 64   void InsertHelper(Instruction *I, const Twine &Name,
 74                                public InstVisitor<InstCombiner, Instruction*> {
 106   // Visitation implementation - Implement instruction combining for different
 107   // instruction types.  The semantics are as follows:
 111   //   otherwise    - Change was made, replace I with returned instruction
 113   Instruction *visitAdd(BinaryOperator &I);
 114   Instruction *visitFAdd(BinaryOperator &I);
 116   Instruction *visitSub(BinaryOperator &I);
 117   Instruction *visitFSub(BinaryOperator &I)
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| /art/compiler/dex/quick/ | 
| mir_to_lir.cc | 33   Instruction::Code opcode = mir->dalvikInsn.opcode; 76     case Instruction::NOP:
 79     case Instruction::MOVE_EXCEPTION:
 83     case Instruction::RETURN_VOID:
 94     case Instruction::RETURN:
 95     case Instruction::RETURN_OBJECT:
 102     case Instruction::RETURN_WIDE:
 109     case Instruction::MOVE_RESULT_WIDE:
 115     case Instruction::MOVE_RESULT:
 116     case Instruction::MOVE_RESULT_OBJECT
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| /dalvik/dx/tests/031-bb-dead-code/ | 
| info.txt | 2 dead code. There is at least one example of dead code after each instruction 3 that *doesn't* flow to the next instruction.
 
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| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ | 
| nomem64-err2.errwarn | 1 -:2: error: cannot use A/B/C/DH with instruction needing REX 2 -:3: error: cannot use A/B/C/DH with instruction needing REX
 
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| sse4-err.errwarn | 1 -:2: error: cannot use A/B/C/DH with instruction needing REX 2 -:3: error: cannot use A/B/C/DH with instruction needing REX
 
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| cpubasic-err.errwarn | 1 -:2: warning: `pause' is an instruction in CPU P4 3 -:7: warning: `fninit' is an instruction in CPU FPU
 5 -:16: warning: `movsd' is an instruction in CPU 386
 
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| /external/valgrind/main/none/tests/s390x/ | 
| op00.c | 1 /* Test for invalid instruction 00. */ 
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| /ndk/tests/build/issue21132-__ARM_ARCH__/jni/ | 
| Application.mk | 1 # Only armeabi-v7a and x86 instruction for fast __swap32md 
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ | 
| radeon_opcodes.h | 40 	/** vec4 instruction: dst.c = abs(src0.c); */ 43 	/** vec4 instruction: dst.c = src0.c + src1.c; */
 46 	/** special instruction: load address register
 50 	/** vec4 instruction: dst.c = ceil(src0.c) */
 53 	/** vec4 instruction: dst.c = clamp(src0.c, src1.c, src2.c) */
 56 	/** vec4 instruction: dst.c = src0.c < 0.0 ? src1.c : src2.c */
 59 	/** vec4 instruction: dst.c = src2.c > 0.5 ? src0.c : src1.c */
 62 	/** scalar instruction: dst = cos(src0.x) */
 65 	/** special instruction: take vec4 partial derivative in X direction
 69 	/** special instruction: take vec4 partial derivative in Y directio
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| /external/mesa3d/src/gallium/drivers/r300/compiler/ | 
| radeon_opcodes.h | 40 	/** vec4 instruction: dst.c = abs(src0.c); */ 43 	/** vec4 instruction: dst.c = src0.c + src1.c; */
 46 	/** special instruction: load address register
 50 	/** vec4 instruction: dst.c = ceil(src0.c) */
 53 	/** vec4 instruction: dst.c = clamp(src0.c, src1.c, src2.c) */
 56 	/** vec4 instruction: dst.c = src0.c < 0.0 ? src1.c : src2.c */
 59 	/** vec4 instruction: dst.c = src2.c > 0.5 ? src0.c : src1.c */
 62 	/** scalar instruction: dst = cos(src0.x) */
 65 	/** special instruction: take vec4 partial derivative in X direction
 69 	/** special instruction: take vec4 partial derivative in Y directio
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| /external/llvm/test/MC/Disassembler/SystemZ/ | 
| unmapped.txt | 3 # An unmapped 2-byte instruction 5 # CHECK: warning: invalid instruction encoding
 11 # An unmapped 4-byte instruction
 13 # CHECK-NEXT: warning: invalid instruction encoding
 19 # An unmapped 6-byte instruction
 21 # CHECK-NEXT: warning: invalid instruction encoding
 29 # CHECK-NEXT: warning: invalid instruction encoding
 
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| /art/compiler/sea_ir/ir/ | 
| visitor.h | 52   virtual void Visit(ConstInstructionNode* instruction) = 0; 53   virtual void Visit(UnnamedConstInstructionNode* instruction) = 0;
 54   virtual void Visit(ReturnInstructionNode* instruction) = 0;
 55   virtual void Visit(IfNeInstructionNode* instruction) = 0;
 56   virtual void Visit(MoveResultInstructionNode* instruction) = 0;
 57   virtual void Visit(InvokeStaticInstructionNode* instruction) = 0;
 58   virtual void Visit(AddIntInstructionNode* instruction) = 0;
 59   virtual void Visit(GotoInstructionNode* instruction) = 0;
 60   virtual void Visit(IfEqzInstructionNode* instruction) = 0;
 70   virtual void Traverse(ConstInstructionNode* instruction) { }
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| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Analysis/ | 
| AnalyzedInstruction.java | 41      * The actual instruction 43     protected Instruction instruction;  field in class:AnalyzedInstruction
 46      * The index of the instruction, where the first instruction in the method is at index 0, and so on
 61      * This contains the register types *before* the instruction has executed
 66      * This contains the register types *after* the instruction has executed
 71      * When deodexing, we might need to deodex this instruction multiple times, when we merge in new register
 72      * information. When this happens, we need to restore the original (odexed) instruction, so we can deodex it again
 74     protected final Instruction originalInstruction
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| /art/compiler/dex/quick/mips/ | 
| fp_mips.cc | 24 void MipsMir2Lir::GenArithOpFloat(Instruction::Code opcode, 34     case Instruction::ADD_FLOAT_2ADDR:
 35     case Instruction::ADD_FLOAT:
 38     case Instruction::SUB_FLOAT_2ADDR:
 39     case Instruction::SUB_FLOAT:
 42     case Instruction::DIV_FLOAT_2ADDR:
 43     case Instruction::DIV_FLOAT:
 46     case Instruction::MUL_FLOAT_2ADDR:
 47     case Instruction::MUL_FLOAT:
 50     case Instruction::REM_FLOAT_2ADDR
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| /external/proguard/src/proguard/classfile/editor/ | 
| InstructionWriter.java | 26 import proguard.classfile.instruction.*; 27 import proguard.classfile.instruction.visitor.InstructionVisitor;
 68         // Try to write out the instruction.
 78             // Try to write out the instruction.
 83             // Create a new constant instruction that will fit.
 84             Instruction replacementInstruction =
 91             // Write out a dummy constant instruction for now.
 103             // Try to write out the instruction.
 108             // Create a new variable instruction that will fit.
 109             Instruction replacementInstruction
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| CodeAttributeEditor.java | 28 import proguard.classfile.instruction.*; 29 import proguard.classfile.instruction.visitor.InstructionVisitor;
 62     /*private*/public Instruction[]    preInsertions  = new Instruction[ClassConstants.TYPICAL_CODE_LENGTH];
 63     /*private*/public Instruction[]    replacements   = new Instruction[ClassConstants.TYPICAL_CODE_LENGTH];
 64     /*private*/public Instruction[]    postInsertions = new Instruction[ClassConstants.TYPICAL_CODE_LENGTH];
 101             preInsertions  = new Instruction[codeLength];
 102             replacements   = new Instruction[codeLength]
 562  Instruction instruction = InstructionFactory.create(oldCode, oldOffset);  local
 644  Instruction instruction = InstructionFactory.create(oldCode, oldOffset);  local
 1097  Instruction instruction = instructions[index];  local
 1140  Instruction instruction = instructions[index];  local
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| /art/compiler/sea_ir/code_gen/ | 
| code_gen.h | 58   // Returns the llvm::Value* corresponding to the output of @instruction. 59   llvm::Value* GetValue(InstructionNode* instruction) {
 60     return GetValue(instruction->Id());
 66   // Records @value as corresponding to the sea_ir::InstructionNode  @instruction.
 67   void AddValue(InstructionNode* instruction, llvm::Value* value) {
 68       AddValue(instruction->Id(), value);
 109   void Visit(InstructionNode* instruction) { }
 111   void Visit(UnnamedConstInstructionNode* instruction) { }
 112   void Visit(ConstInstructionNode* instruction) { }
 113   void Visit(ReturnInstructionNode* instruction) { }
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| /dalvik/dx/tests/100-local-mismatch/ | 
| info.txt | 2 variable table entry fundamentally disagrees with an instruction that 
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| /external/llvm/test/TableGen/ | 
| LetInsideMultiClasses.td | 3 class Instruction<bits<4> opc, string Name> { 11     def rr : Instruction<opc, "rr">;
 12     def rm : Instruction<opc, "rm">;
 16     def rx : Instruction<opc, "rx">;
 
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| /external/chromium/base/ | 
| cpu_unittest.cc | 12 // "undefined instruction" exceptions. That is, this test succeeds when this 22   // Execute an MMX instruction.
 26     // Execute an SSE instruction.
 31     // Execute an SSE 2 instruction.
 36     // Execute an SSE 3 instruction.
 41     // Execute a Supplimental SSE 3 instruction.
 46     // Execute an SSE 4.1 instruction.
 51     // Execute an SSE 4.2 instruction.
 57   // Execute an MMX instruction.
 61     // Execute an SSE instruction
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| /external/chromium_org/base/ | 
| cpu_unittest.cc | 13 // "undefined instruction" exceptions. That is, this test succeeds when this 24   // Execute an MMX instruction.
 28     // Execute an SSE instruction.
 33     // Execute an SSE 2 instruction.
 38     // Execute an SSE 3 instruction.
 43     // Execute a Supplimental SSE 3 instruction.
 48     // Execute an SSE 4.1 instruction.
 53     // Execute an SSE 4.2 instruction.
 59   // Execute an MMX instruction.
 63     // Execute an SSE instruction
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| /external/proguard/src/proguard/optimize/evaluation/ | 
| EvaluationSimplifier.java | 27 import proguard.classfile.instruction.*; 28 import proguard.classfile.instruction.visitor.InstructionVisitor;
 145                 Instruction instruction = InstructionFactory.create(codeAttribute.code,  local
 148                 instruction.accept(clazz, method, codeAttribute, offset, this);
 370      * Replaces the push instruction at the given offset by a simpler push
 371      * instruction, if possible.
 375                                            Instruction instruction)
 383                     replaceIntegerPushInstruction(clazz, offset, instruction);
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