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  /external/mesa3d/src/gallium/auxiliary/tgsi/
tgsi_build.c 578 * instruction
584 struct tgsi_instruction instruction; local
586 instruction.Type = TGSI_TOKEN_TYPE_INSTRUCTION;
587 instruction.NrTokens = 0;
588 instruction.Opcode = TGSI_OPCODE_MOV;
589 instruction.Saturate = TGSI_SAT_NONE;
590 instruction.Predicate = 0;
591 instruction.NumDstRegs = 1;
592 instruction.NumSrcRegs = 1;
593 instruction.Label = 0
608 struct tgsi_instruction instruction; local
971 struct tgsi_instruction *instruction; local
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  /art/runtime/interpreter/
interpreter.cc 421 const Instruction* inst, JValue* result) NO_THREAD_SAFETY_ANALYSIS;
425 const Instruction* inst, JValue* result) {
528 const Instruction* inst, JValue* result)
533 const Instruction* inst, JValue* result) {
627 const Instruction* inst)
632 const Instruction* inst) {
685 const Instruction* inst)
690 const Instruction* inst) {
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  /external/chromium_org/third_party/yasm/source/patched-yasm/libyasm/
insn.h 3 * \brief YASM mnenomic instruction.
56 * can be split into different forms in order to minimize instruction
78 /** An instruction operand (opaque type). */
81 /** The type of an instruction operand. */
90 /** An instruction operand. */
115 * the operand type appropriately depending on the instruction type.
134 /** Base structure for "instruction" bytecodes. These are the mnenomic
137 * #yasm_arch implementation of mnenomic instruction bytecodes.
163 /** Create an instruction operand from a register.
170 /** Create an instruction operand from a segment register
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  /external/llvm/test/MC/ARM/
thumb-diagnostics.s 8 @ ADD instruction w/o 'S' suffix.
10 @ CHECK-ERRORS: error: invalid instruction
17 @ CHECK-ERRORS: error: instruction variant requires Thumb2
20 @ CHECK-ERRORS-V5: error: instruction variant requires ARMv6 or later
25 @ Out of range immediates for ASR instruction.
27 @ CHECK-ERRORS: error: invalid operand for instruction
31 @ Out of range immediates for BKPT instruction.
34 error: invalid operand for instruction
37 error: invalid operand for instruction
70 @ CHECK-ERRORS: error: instruction requires: thumb
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  /external/proguard/src/proguard/classfile/instruction/
VariableInstruction.java 21 package proguard.classfile.instruction;
25 import proguard.classfile.instruction.visitor.InstructionVisitor;
28 * This Instruction represents an instruction that refers to a variable on the
33 public class VariableInstruction extends Instruction
78 * Copies the given instruction into this instruction.
79 * @param variableInstruction the instruction to be copied.
80 * @return this instruction.
140 * Returns whether this instruction stores the value of a variable
    [all...]
package.html 4 Not every instruction currently has its own class. Only groups of instructions
  /external/llvm/lib/Analysis/
PHITransAddr.cpp 25 static bool CanPHITrans(Instruction *Inst) {
34 if (Inst->getOpcode() == Instruction::Add &&
58 SmallVectorImpl<Instruction*> &InstInputs) {
59 // If this is a non-instruction value, there is nothing to do.
60 Instruction *I = dyn_cast<Instruction>(Expr);
63 // If it's an instruction, it is either in Tmp or its operands recursively
65 SmallVectorImpl<Instruction*>::iterator Entry =
75 errs() << "Non phi translatable instruction found in PHITransAddr:\n";
81 // Validate the operands of the instruction
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  /dalvik/dx/tests/093-ssa-invoke-range/
info.txt 2 for dex's invoke-range instruction.
  /dalvik/dx/tests/098-dex-jsr-ret-throw/
info.txt 2 It contains an example of a subroutine being exited by a "throw" instruction in
  /dalvik/vm/compiler/template/armv5te-vfp/
fbinop.S 3 * specifies an instruction that performs s2 = s0 op s1.
fbinopWide.S 3 * specifies an instruction that performs s2 = s0 op s1.
  /dalvik/vm/mterp/armv5te/
OP_BREAKPOINT.S 5 * Restart this instruction with the original opcode. By
OP_CONST_16.S 8 GOTO_OPCODE(ip) @ jump to next instruction
stub.S 6 FETCH_INST() @ load next instruction from rPC
  /dalvik/vm/mterp/mips/
OP_BREAKPOINT.S 5 * Restart this instruction with the original opcode. By
OP_MOVE_EXCEPTION.S 10 GOTO_OPCODE(t0) # jump to next instruction
stub.S 8 FETCH_INST() # load next instruction from rPC
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/gas64/
gas-prefix.errwarn 3 -:6: warning: REX prefix not allowed on this instruction, ignoring
  /external/clang/test/CodeGen/
2003-11-03-AddrArrayElement.c 3 // This should be turned into a tasty getelementptr instruction, not a nasty
  /external/llvm/include/llvm/Analysis/
IVUsers.h 25 class Instruction;
34 /// instruction of the operand, and 'OperandValToReplace' is the operand of
39 IVStrideUse(IVUsers *P, Instruction* U, Value *O)
43 /// getUser - Return the user instruction for this use.
44 Instruction *getUser() const {
45 return cast<Instruction>(getValPtr());
48 /// setUser - Assign a new user instruction for this use.
49 void setUser(Instruction *NewUser) {
54 /// instruction that this IVStrideUse is representing.
79 /// OperandValToReplace - The Value of the operand in the user instruction
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  /external/llvm/test/MC/AsmParser/
purgem.s 12 # CHECK: error: invalid instruction mnemonic 'foo'
  /external/llvm/test/MC/Disassembler/AArch64/
ldp-offset-predictable.txt 5 # CHECK-NOT: potentially undefined instruction encoding
  /external/llvm/test/MC/X86/
x86_errors.s 14 // 32: test.s:8:2: error: invalid instruction mnemonic 'movi'
19 movl 0(%rax), 0(%edx) // error: invalid operand for instruction
21 // 32: error: instruction requires: 64-bit mode
32 // 32: error: invalid operand for instruction
  /external/llvm/test/Transforms/InstCombine/
2004-01-13-InstCombineInvokePHI.ll 2 ; instcombine pass is trying to get rid of the cast in the invoke instruction,
3 ; inserting a cast of the return value after the PHI instruction, but which is
4 ; used by the PHI instruction. This is bad: because of the semantics of the
5 ; invoke instruction, we really cannot perform this transformation at all at
  /external/llvm/test/Verifier/
2006-07-11-StoreStruct.ll 3 ; CHECK-NOT: Instruction operands must be first-class

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