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  /dalvik/vm/mterp/x86/
binop.S 4 * specifies an instruction that performs "result = eax op (rFP,%ecx,4)".
5 * This could be an x86 instruction or a function call. (If the result
binopLit16.S 4 * that specifies an instruction that performs "result = eax op ecx".
5 * This could be an x86 instruction or a function call. (If the result
binopLit8.S 4 * that specifies an instruction that performs "result = eax op ecx".
5 * This could be an x86 instruction or a function call. (If the result
  /external/chromium_org/third_party/tcmalloc/chromium/src/windows/
preamble_patcher.h 50 // bytes + the max instruction size + 5 more bytes for our jump back to
58 // So 4 bytes + max instruction size (17 bytes) + 5 bytes to jump back to the
127 // - If there is a jump (jxx) instruction in the first 5 bytes of
133 // - If there is a return (ret) instruction in the first 5 bytes
135 // for the jmp instruction we use to inject our patch.
141 // patcher at an invalid instruction (e.g. into the middle of a multi-
142 // byte instruction, or not at memory containing executable instructions)
144 // instruction boundaries.
304 // target_function's body consists entirely of a JMP instruction,
444 // target_function's body consists entirely of a JMP instruction,
    [all...]
  /external/chromium_org/third_party/tcmalloc/vendor/src/windows/
preamble_patcher.h 50 // bytes + the max instruction size + 5 more bytes for our jump back to
58 // So 4 bytes + max instruction size (17 bytes) + 5 bytes to jump back to the
127 // - If there is a jump (jxx) instruction in the first 5 bytes of
133 // - If there is a return (ret) instruction in the first 5 bytes
135 // for the jmp instruction we use to inject our patch.
141 // patcher at an invalid instruction (e.g. into the middle of a multi-
142 // byte instruction, or not at memory containing executable instructions)
144 // instruction boundaries.
304 // target_function's body consists entirely of a JMP instruction,
444 // target_function's body consists entirely of a JMP instruction,
    [all...]
  /external/dexmaker/src/dx/java/com/android/dx/dex/code/
OutputCollector.java 33 * {@code non-null;} the associated finisher (which holds the instruction
60 * Adds an instruction to the output.
62 * @param insn {@code non-null;} the instruction to add
71 * indicated instruction really is a reversible branch.
74 * {@code 0} is the most recently added instruction,
75 * {@code 1} is the instruction before that, etc.
83 * Adds an instruction to the output suffix.
85 * @param insn {@code non-null;} the instruction to add
  /external/llvm/lib/Transforms/ObjCARC/
DependencyAnalysis.h 30 class Instruction;
55 BasicBlock *StartBB, Instruction *StartInst,
56 SmallPtrSet<Instruction *, 4> &DependingInstructions,
61 Depends(DependenceKind Flavor, Instruction *Inst, const Value *Arg,
64 /// Test whether the given instruction can "use" the given pointer's object in a
67 CanUse(const Instruction *Inst, const Value *Ptr, ProvenanceAnalysis &PA,
70 /// Test whether the given instruction can result in a reference count
73 CanAlterRefCount(const Instruction *Inst, const Value *Ptr,
  /external/llvm/test/Analysis/BasicAA/
2003-02-26-AccessSizeTest.ll 2 ; is performed. It is not legal to delete the second load instruction because
3 ; the value computed by the first load instruction is changed by the store.
  /external/llvm/test/CodeGen/ARM/
2010-10-25-ifcvt-ldm.ll 3 ; LDM instruction, was causing an assertion failure because the microop count
4 ; was being treated as an instruction count.
  /external/llvm/test/CodeGen/Mips/
machineverifier.ll 2 ; Make sure machine verifier understands the last instruction of a basic block
3 ; is not the terminator instruction after delay slot filler pass is run.
  /external/llvm/test/CodeGen/X86/
2005-01-17-CycleInDAG.ll 2 ; load into the sub instruction here as it induces a cycle in the dag, which
3 ; is invalid code (there is no correct way to order the instruction). Check
  /external/llvm/test/Transforms/LoopStrengthReduce/
exit_compare_live_range.ll 1 ; Make sure that the compare instruction occurs after the increment to avoid
3 ; instruction immediately before the conditional branch.
  /external/llvm/test/Transforms/SimplifyCFG/
DeadSetCC.ll 4 ; Check that simplifycfg deletes a dead 'seteq' instruction when it
5 ; folds a conditional branch into a switch instruction.
  /ndk/tests/build/mips-fp4/
build.sh 5 # Find instruction in file
6 # $1: instruction
  /ndk/tests/device/test-stlport_shared-exception/jni/
eh1.cpp 32 // On the sparc, the return will use a ld [%l0],%i0 instruction.
51 // The return will use a ld [%l2],%i0 instruction. Since %l2
  /ndk/tests/device/test-stlport_static-exception/jni/
eh1.cpp 32 // On the sparc, the return will use a ld [%l0],%i0 instruction.
51 // The return will use a ld [%l2],%i0 instruction. Since %l2
  /external/llvm/include/llvm/Analysis/
PtrUseVisitor.h 10 /// This file provides a collection of visitors which walk the (instruction)
67 /// \brief Get the instruction causing the visit to abort.
68 /// \returns a pointer to the instruction causing the abort if one is
70 Instruction *getAbortingInst() const { return AbortedInfo.getPointer(); }
72 /// \brief Get the instruction causing the pointer to escape.
73 /// \returns a pointer to the instruction which escapes the pointer if one
75 Instruction *getEscapingInst() const { return EscapedInfo.getPointer(); }
78 /// \param I The instruction which caused the visit to abort, if available.
79 void setAborted(Instruction *I = 0) {
85 /// \param I The instruction which escapes the pointer, if available
    [all...]
  /art/compiler/sea_ir/types/
types.h 29 // Stores information about the result type of each instruction.
30 // Note: Main purpose is to encapsulate the map<instruction id, type*>,
37 // Returns the type associated with instruction with @instruction_id.
46 // Saves the fact that instruction @instruction_id produces a value of type @type.
  /dalvik/vm/compiler/template/armv5te-vfp/
funop.S 3 * "instr" line that specifies an instruction that performs "s1 = op s0".
funopNarrower.S 3 * "instr" line that specifies an instruction that performs "s0 = op d0".
funopWider.S 3 * "instr" line that specifies an instruction that performs "d0 = op s0".
  /dalvik/vm/mterp/arm-vfp/
README.txt 0 Instruction handlers that take advantage of ARM VFP. These work with VFP
  /dalvik/vm/mterp/armv5te/
OP_CONST.S 10 GOTO_OPCODE(ip) @ jump to next instruction
OP_CONST_4.S 10 GOTO_OPCODE(ip) @ execute next instruction
OP_CONST_HIGH16.S 9 GOTO_OPCODE(ip) @ jump to next instruction

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