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  /dalvik/vm/mterp/armv5te/
OP_CONST_WIDE_16.S 10 GOTO_OPCODE(ip) @ jump to next instruction
OP_MOVE.S 11 GOTO_OPCODE(ip) @ execute next instruction
OP_MOVE_16.S 10 GOTO_OPCODE(ip) @ jump to next instruction
OP_MOVE_EXCEPTION.S 10 GOTO_OPCODE(ip) @ jump to next instruction
OP_MOVE_FROM16.S 10 GOTO_OPCODE(ip) @ jump to next instruction
OP_MOVE_RESULT.S 9 GOTO_OPCODE(ip) @ jump to next instruction
OP_THROW_VERIFICATION_ERROR.S 3 * Handle a throw-verification-error instruction. This throws an
  /dalvik/vm/mterp/armv6t2/
OP_CONST_4.S 9 GOTO_OPCODE(ip) @ execute next instruction
OP_MOVE.S 10 GOTO_OPCODE(ip) @ execute next instruction
  /dalvik/vm/mterp/mips/
OP_CONST_WIDE_16.S 10 GOTO_OPCODE(t0) # jump to next instruction
OP_CONST_WIDE_32.S 13 GOTO_OPCODE(t0) # jump to next instruction
OP_CONST_WIDE_HIGH16.S 11 GOTO_OPCODE(t0) # jump to next instruction
OP_MONITOR_ENTER.S 16 GOTO_OPCODE(t0) # jump to next instruction
OP_MOVE_RESULT_WIDE.S 10 GOTO_OPCODE(t0) # jump to next instruction
OP_THROW_VERIFICATION_ERROR.S 3 * Handle a throw-verification-error instruction. This throws an
  /dalvik/vm/mterp/x86/
OP_BREAKPOINT.S 5 * Restart this instruction with the original opcode. By
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/
mem64-err.errwarn 5 -:7: error: cannot use A/B/C/DH with instruction needing REX
  /external/clang/test/CodeGen/
asm-errors.c 8 // CHECK: error: invalid instruction mnemonic 'abc'
  /external/llvm/test/CodeGen/ARM/
a15-partial-update.ll 5 ; The generated code for this test uses a vld1.32 instruction
9 ; vld1.32 instruction. The test checks that a vmov.f64 was not
23 ; The code generated by this test uses a vld1.32 instruction.
24 ; We check that a dependency breaking vmov* instruction was
  /external/llvm/test/CodeGen/PowerPC/
2005-10-08-ArithmeticRotate.ll 1 ; This was erroneously being turned into an rlwinm instruction.
  /external/llvm/test/CodeGen/Thumb2/
2010-12-03-AddSPNarrowing.ll 2 ; Radar 8724703: Make sure that a t2ADDrSPi instruction with SP as the
  /external/llvm/test/CodeGen/X86/
subreg-to-reg-0.ll 3 ; Do eliminate the zero-extension instruction and rely on
  /external/llvm/test/CodeGen/XCore/
2009-01-08-Crash.ll 3 ;; address arithmetic was folded into the LDWSP instruction,
  /external/llvm/test/Transforms/InstCombine/
2002-08-02-CastTest.ll 2 ; SOME instruction named %c here, even if it's a bitwise and.
2003-06-05-BranchInvertInfLoop.ll 1 ; This testcase causes an infinite loop in the instruction combiner,

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