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  /external/llvm/test/Transforms/SCCP/
apint-basictest.ll 1 ; This is a basic sanity check for constant propagation. The add instruction
  /external/oprofile/events/arm/armv6/
events.h 3 "number of instruction fetch misses"},
5 "cycles instruction fetch pipe is stalled"},
9 "number of Instruction MicroTLB misses"},
13 "branch instruction executed w/ or w/o program flow change"},
  /external/oprofile/module/x86/
op_arch.h 16 /* How to access the processor's instruction pointer */
  /external/qemu/tcg/
TODO 12 parameters given with a specific instruction).
  /external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/Format/
UnresolvedOdexInstructionMethodItem.java 38 public UnresolvedOdexInstructionMethodItem(CodeItem codeItem, int codeAddress, UnresolvedOdexInstruction instruction) {
39 super(codeItem, codeAddress, instruction);
48 writer.write("#Replaced unresolvable odex instruction with a throw\n");
50 writeRegister(writer, instruction.ObjectRegisterNum);
  /external/v8/src/arm/
disasm-arm.cc 28 // A Disassembler object is used to disassemble a block of code instruction by
29 // instruction. The default implementation of the NameConverter object can be
88 // Writes one disassembled instruction into 'buffer' (0-terminated).
89 // Returns the length of the disassembled machine instruction in bytes.
90 int InstructionDecode(byte* instruction);
104 int FormatVFPRegister(Instruction* instr, const char* format);
105 void PrintMovwMovt(Instruction* instr);
106 int FormatVFPinstruction(Instruction* instr, const char* format);
107 void PrintCondition(Instruction* instr);
108 void PrintShiftRm(Instruction* instr)
    [all...]
  /external/llvm/lib/Transforms/Utils/
SimplifyIndVar.cpp 72 Value *foldIVUser(Instruction *UseInst, Instruction *IVOperand);
74 bool eliminateIVUser(Instruction *UseInst, Instruction *IVOperand);
82 /// aligned IV when used by a instruction that ignores the low bits.
89 Value *SimplifyIndvar::foldIVUser(Instruction *UseInst, Instruction *IVOperand) {
96 case Instruction::UDiv:
97 case Instruction::LShr:
115 if (UseInst->getOpcode() == Instruction::LShr)
    [all...]
  /dalvik/dx/src/com/android/dx/io/instructions/
PackedSwitchPayloadDecodedInstruction.java 20 * A decoded Dalvik instruction which contains the payload for
21 * a {@code packed-switch} instruction.
60 throw new UnsupportedOperationException("no index in instruction");
SparseSwitchPayloadDecodedInstruction.java 20 * A decoded Dalvik instruction which contains the payload for
21 * a {@code packed-switch} instruction.
64 throw new UnsupportedOperationException("no index in instruction");
  /dalvik/vm/compiler/codegen/arm/
GlobalOptimizations.cpp 33 /* Branch to the next instruction */
41 * Is the branch target the next instruction?
52 * instruction.
  /dalvik/vm/mterp/arm-vfp/
fbinop.S 3 * specifies an instruction that performs "s2 = s0 op s1". Because we
4 * use the "softfp" ABI, this must be an instruction, not a function call.
23 GOTO_OPCODE(ip) @ jump to next instruction
  /dalvik/vm/mterp/armv5te/
binopLit16.S 4 * that specifies an instruction that performs "result = r0 op r1".
5 * This could be an ARM instruction or a function call. (If the result
29 GOTO_OPCODE(ip) @ jump to next instruction
unopNarrower.S 4 * that specifies an instruction that performs "result = op r0/r1", where
9 * (This would work for long-to-int, but that instruction is actually
23 GOTO_OPCODE(ip) @ jump to next instruction
unopWide.S 4 * specifies an instruction that performs "result = op r0/r1".
5 * This could be an ARM instruction or a function call.
21 GOTO_OPCODE(ip) @ jump to next instruction
  /dalvik/vm/mterp/armv6t2/
binopLit16.S 4 * that specifies an instruction that performs "result = r0 op r1".
5 * This could be an ARM instruction or a function call. (If the result
28 GOTO_OPCODE(ip) @ jump to next instruction
unopNarrower.S 4 * that specifies an instruction that performs "result = op r0/r1", where
9 * (This would work for long-to-int, but that instruction is actually
22 GOTO_OPCODE(ip) @ jump to next instruction
unopWide.S 4 * specifies an instruction that performs "result = op r0/r1".
5 * This could be an ARM instruction or a function call.
20 GOTO_OPCODE(ip) @ jump to next instruction
  /dalvik/vm/mterp/mips/
binflop2addr.S 5 * that specifies an instruction that performs "result = a0 op a1".
6 * This could be an MIPS instruction or a function call.
43 GOTO_OPCODE(t0) # jump to next instruction
unflopWide.S 4 * specifies an instruction that performs "result = op a0/a1".
5 * This could be a MIPS instruction or a function call.
30 GOTO_OPCODE(t0) # jump to next instruction
unopNarrower.S 4 * that specifies an instruction that performs "result = op a0/a1", where
10 * (This would work for long-to-int, but that instruction is actually
36 GOTO_OPCODE(t0) # jump to next instruction
  /external/dexmaker/src/dx/java/com/android/dx/io/instructions/
PackedSwitchPayloadDecodedInstruction.java 20 * A decoded Dalvik instruction which contains the payload for
21 * a {@code packed-switch} instruction.
60 throw new UnsupportedOperationException("no index in instruction");
SparseSwitchPayloadDecodedInstruction.java 20 * A decoded Dalvik instruction which contains the payload for
21 * a {@code packed-switch} instruction.
64 throw new UnsupportedOperationException("no index in instruction");
  /external/ganymed-ssh2/src/main/java/ch/ethz/ssh2/packets/
PacketUserauthInfoRequest.java 20 String instruction; field in class:PacketUserauthInfoRequest
40 instruction = tr.readString();
65 return instruction;
  /external/llvm/test/MC/Disassembler/SystemZ/
invalid-regs.txt 5 # CHECK: warning: invalid instruction encoding
12 # CHECK-NEXT: warning: invalid instruction encoding
19 # CHECK-NEXT: warning: invalid instruction encoding
  /external/llvm/test/MC/X86/AlignedBundling/
pad-align-to-bundle-end.s 29 # The nop sequence may be implemented as one instruction or many, but if
30 # it's one instruction, that instruction cannot itself cross the boundary.

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