| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
| x86arch.h | 53 #define CPU_Cyrix 19 /* Cyrix-specific instruction */
55 #define CPU_SMM 21 /* System Management Mode instruction */
56 #define CPU_Prot 22 /* Protected mode only instruction */
57 #define CPU_Undoc 23 /* Undocumented instruction */
58 #define CPU_Obs 24 /* Obsolete instruction */
59 #define CPU_Priv 25 /* Priveleged instruction */
60 #define CPU_SVM 26 /* Secure Virtual Machine instruction */
61 #define CPU_PadLock 27 /* VIA PadLock instruction */
70 #define CPU_AES 36 /* AES instruction */
71 #define CPU_CLMUL 37 /* PCLMULQDQ instruction */
[all...] |
| /external/chromium_org/v8/src/ia32/ |
| cpu-ia32.cc | 55 // No need to flush the instruction cache on Intel. On Intel instruction
59 // own instruction cache updated automatically.
61 // If flushing of the instruction cache becomes necessary Windows has the
|
| /external/javassist/src/main/javassist/bytecode/analysis/ |
| package.html | 7 at the start of every instruction. In addition this API can be used to validate
|
| /external/javassist/src/main/javassist/bytecode/ |
| package.html | 7 bytecode instruction, and so on.
|
| /external/kernel-headers/original/asm-mips/ |
| cachectl.h | 14 #define ICACHE (1<<0) /* flush instruction cache */
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBundle.h | 10 // This file provide utility functions to manipulate machine instruction
22 /// finalizeBundle - Finalize a machine instruction bundle which includes
24 /// This routine adds a BUNDLE instruction to represent the bundle, it adds
27 /// instruction.
33 /// the last instruction in the bundle is not provided as an input. This is
35 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
40 /// finalizeBundles - Finalize instruction bundles in the specified
44 /// getBundleStart - Returns the first instruction in the bundle containing MI.
99 // bundled instruction with operands.
112 /// on MI, or all operands on every instruction in the bundle containing MI
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrItineraries.h | 10 // This file describes the structures used for instruction
12 // schedulers to determine instruction stages and latencies.
25 /// Instruction stage - These values represent a non-pipelined step in
26 /// the execution of an instruction. Cycles represents the number of
48 /// indicate that the instruction requires multiple stages at the
52 /// - FUs which instruction actually requires
53 /// - FUs which instruction just reserves. Reserved unit is not available for
54 /// execution of other instruction. However, several instructions can reserve
56 /// Such two types of units reservation is used to model instruction domain
93 /// Instruction itinerary - An itinerary represents the schedulin
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 44 /// \brief Given a machine register, look for the instruction
46 /// try to replace it with an equivalent LEA instruction.
48 /// instruction.
52 /// \brief Given a memory access or LEA instruction
54 /// an opportunity to replace the instruction which sets the base or index
55 /// register with an equivalent LEA instruction.
59 /// \brief Determine if an instruction references a machine register
65 /// for an instruction which writes a register within
66 /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
71 /// \brief if an instruction can be converted to an
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| CorrelatedValuePropagation.cpp | 41 bool processMemAccess(Instruction *I);
140 bool CorrelatedValuePropagation::processMemAccess(Instruction *I) {
164 if (isa<Instruction>(Op0) &&
165 cast<Instruction>(Op0)->getParent() == C->getParent())
198 /// processSwitch - Simplify a switch instruction by removing cases which can
211 if (isa<Instruction>(Cond) && cast<Instruction>(Cond)->getParent() == BB)
291 Instruction *II = BI++;
293 case Instruction::Select:
296 case Instruction::PHI
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| ehabi-unwind.ll | 1 ; Test that the EHABI unwind instruction generator does not encounter any
|
| /external/llvm/test/MC/X86/AlignedBundling/ |
| relax-at-bundle-end.s | 4 # Test that an instruction near a bundle end gets properly padded
|
| /external/llvm/test/Object/ARM/ |
| symbol-addr.ll | 6 ; Check that the symbol address does not include the ARM/Thumb instruction
|
| /external/llvm/test/Transforms/ConstProp/ |
| 2002-05-03-NotOperator.ll | 5 ; Fix #2: The unary not instruction now no longer exists. Change to xor.
|
| phi.ll | 1 ; This is a basic sanity check for constant propagation. The add instruction
|
| /external/llvm/test/Verifier/ |
| dominates.ll | 7 ; CHECK: Instruction does not dominate all uses!
23 ; CHECK: Instruction does not dominate all uses!
41 ; CHECK: Instruction does not dominate all uses!
54 ; CHECK: Instruction does not dominate all uses!
|
| /external/llvm/utils/TableGen/ |
| PseudoLoweringEmitter.cpp | 36 CodeGenInstruction Source; // The source pseudo instruction definition.
37 CodeGenInstruction Dest; // The destination instruction to lower to.
68 // FIXME: This pass currently can only expand a pseudo to a single instruction.
125 // of arguments for the instruction it references.
127 assert(Dag && "Missing result instruction in pseudo expansion!");
135 if (!Operator->isSubClassOf("Instruction"))
137 "' is not an instruction!");
143 "' cannot be another pseudo instruction!");
163 // argument in the source instruction, in either the (outs) or (ins) list.
175 // We've already handled constant values. Just map instruction operand
[all...] |
| /external/mesa3d/src/gallium/drivers/nv30/ |
| nv30_vertprog.h | 4 /* Vertex programs instruction set
16 * - Only one INPUT can be accessed per-instruction (move extras into TEMPs)
17 * - Only one CONST can be accessed per-instruction (move extras into TEMPs)
24 * ARL instruction is set to TEMP <n> (The temp isn't actually written).
36 * Only one address register can be accessed per instruction.
39 * execution of an instruction is enabled by setting COND_TEST_ENABLE, and
47 * layout. The destination instruction ID (IADDR) overlaps a source field.
48 * Instruction ID's seem to be numbered based on the UPLOAD_FROM_ID FIFO
57 * executed instruction is determined by the PROGRAM_START_ID FIFO command.
|
| /external/proguard/src/proguard/classfile/editor/ |
| VariableSizeUpdater.java | 26 import proguard.classfile.instruction.*;
27 import proguard.classfile.instruction.visitor.InstructionVisitor;
77 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| /external/proguard/src/proguard/optimize/info/ |
| BackwardBranchMarker.java | 25 import proguard.classfile.instruction.*;
26 import proguard.classfile.instruction.visitor.InstructionVisitor;
41 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| DotClassMarker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
46 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| ExceptionInstructionChecker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
33 * This class can tell whether an instruction might throw exceptions.
48 * Returns whether the given instruction may throw exceptions.
50 public boolean mayThrowExceptions(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction)
54 instruction.accept(clazz, method, codeAttribute, offset, this);
62 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| InstanceofClassMarker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
46 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| InstantiationClassMarker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
46 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| MethodInvocationMarker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
46 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
| SuperInvocationMarker.java | 27 import proguard.classfile.instruction.*;
28 import proguard.classfile.instruction.visitor.InstructionVisitor;
47 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
|
