| /external/proguard/src/proguard/optimize/info/ |
| VariableUsageMarker.java | 26 import proguard.classfile.instruction.*;
27 import proguard.classfile.instruction.visitor.InstructionVisitor;
81 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
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| /external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/Format/ |
| ArrayDataMethodItem.java | 40 public ArrayDataMethodItem(CodeItem codeItem, int codeAddress, ArrayDataPseudoInstruction instruction) {
41 super(codeItem, codeAddress, instruction);
46 writer.printUnsignedLongAsHex(instruction.getElementWidth());
50 Iterator<ArrayDataPseudoInstruction.ArrayElement> iterator = instruction.getElements();
|
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Analysis/ |
| SyntheticAccessorResolver.java | 33 import org.jf.dexlib.Code.Instruction;
81 Instruction[] instructions = encodedMethod.codeItem.getInstructions();
92 InstructionWithReference instruction = (InstructionWithReference)instructions[0]; local
93 Item referencedItem = instruction.getReferencedItem();
108 Instruction22c instruction = (Instruction22c)instructions[0]; local
109 Item referencedItem = instruction.getReferencedItem();
115 if (instruction.opcode.setsRegister() || instruction.opcode.setsWideRegister()) {
116 //If the instruction sets a register, that means it is a getter - it gets the field value and
|
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
| Instruction31c.java | 31 import org.jf.dexlib.Code.Instruction;
41 public static final Instruction.InstructionFactory Factory = new Factory();
74 private static class Factory implements Instruction.InstructionFactory {
75 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) {
|
| /external/valgrind/main/none/tests/x86/ |
| faultstatus.stderr.exp | 6 Test 5: disInstr: unhandled instruction bytes: 0x........ 0x........ 0x........ 0x........
|
| /external/llvm/docs/ |
| ExtendingLLVM.rst | 12 function, or a whole new instruction.
24 instruction, and is transparent to optimization passes. If your added
39 instruction. Almost all extensions to LLVM should start as an intrinsic
40 function and then be turned into an instruction if warranted.
80 adding a new instruction. New nodes are often added to help represent
82 instruction (add, sub) or intrinsic (byteswap, population count). In other
153 match an instruction to your new node, you must add a def for that node to
159 Each target has a tablegen file that describes the target's instruction set.
160 For targets that use the DAGToDAG instruction selection framework, add a
172 Adding a new instruction
[all...] |
| /external/proguard/src/proguard/classfile/util/ |
| DynamicClassReferenceInitializer.java | 28 import proguard.classfile.instruction.*;
29 import proguard.classfile.instruction.visitor.InstructionVisitor;
87 private final Instruction[] CONSTANT_CLASS_FOR_NAME_INSTRUCTIONS = new Instruction[]
94 private final Instruction[] CLASS_FOR_NAME_CAST_INSTRUCTIONS = new Instruction[]
118 private final Instruction[] DOT_CLASS_JAVAC_INSTRUCTIONS = new Instruction[]
141 private final Instruction[] DOT_CLASS_JIKES_INSTRUCTIONS = new Instruction[]
[all...] |
| /external/llvm/lib/IR/ |
| Instructions.cpp | 10 // This file implements all of the non-inline methods for the LLVM instruction
34 Instruction *II(getInstruction());
88 : Instruction(PN.getType(), Instruction::PHI,
182 Instruction *InsertBefore)
183 : Instruction(RetTy, Instruction::LandingPad, 0, 0, InsertBefore) {
190 : Instruction(RetTy, Instruction::LandingPad, 0, 0, InsertAtEnd) {
195 : Instruction(LP.getType(), Instruction::LandingPad
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| /external/llvm/lib/Analysis/ |
| InstructionSimplify.cpp | 1 //===- InstructionSimplify.cpp - Fold instruction operands ----------------===//
94 Instruction *I = dyn_cast<Instruction>(V);
114 // Otherwise, if the instruction is in the entry block, and is not an invoke,
131 Instruction::BinaryOps OpcodeToExpand = (Instruction::BinaryOps)OpcToExpand;
146 if ((L == A && R == B) || (Instruction::isCommutative(OpcodeToExpand)
169 if ((L == B && R == C) || (Instruction::isCommutative(OpcodeToExpand)
192 Instruction::BinaryOps OpcodeToExtract = (Instruction::BinaryOps)OpcToExtract
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| InsnFormat.java | 29 * Base class for all instruction format handlers. Instruction format
37 * dump, of the given instruction. The instruction must be of this
40 * @param insn {@code non-null;} the instruction
67 * Returns the string form of the arguments to the given instruction.
68 * The instruction must be of this instance's format. If the instruction
74 * @param insn {@code non-null;} the instruction
80 * Returns the associated comment for the given instruction, if any
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_emit_nv50.cpp | 38 virtual bool emitInstruction(Instruction *);
40 virtual uint32_t getMinEncodingSize(const Instruction *) const;
59 void emitFlagsRd(const Instruction *);
60 void emitFlagsWr(const Instruction *);
66 void setAReg16(const Instruction *, int s);
67 void setImmediate(const Instruction *, int s);
70 void setDst(const Instruction *, int d);
71 void setSrcFileBits(const Instruction *, int enc);
72 void setSrc(const Instruction *, unsigned int s, int slot);
74 void emitForm_MAD(const Instruction *);
[all...] |
| nv50_ir.cpp | 101 Instruction *insn = src->value->getUniqueInsn();
173 if (!insn || !insn->bb) // Unbound instruction ?
180 Instruction *insn = (*it)->getInsn();
276 Instruction *insn = getInsn();
552 void Instruction::init()
582 Instruction::Instruction()
593 Instruction::Instruction(Function *fn, operation opr, DataType ty)
603 Instruction::~Instruction(
[all...] |
| nv50_ir_inlines.h | 176 Instruction *Value::getInsn() const
181 Instruction *Value::getUniqueInsn() const
207 inline bool Instruction::constrainedDefs() const
212 Value *Instruction::getIndirect(int s, int dim) const
217 Value *Instruction::getPredicate() const
222 void Instruction::setFlagsDef(int d, Value *val)
236 void Instruction::setFlagsSrc(int s, Value *val)
252 CmpInstruction *Instruction::asCmp()
259 const CmpInstruction *Instruction::asCmp() const
266 FlowInstruction *Instruction::asFlow(
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_emit_nv50.cpp | 38 virtual bool emitInstruction(Instruction *);
40 virtual uint32_t getMinEncodingSize(const Instruction *) const;
59 void emitFlagsRd(const Instruction *);
60 void emitFlagsWr(const Instruction *);
66 void setAReg16(const Instruction *, int s);
67 void setImmediate(const Instruction *, int s);
70 void setDst(const Instruction *, int d);
71 void setSrcFileBits(const Instruction *, int enc);
72 void setSrc(const Instruction *, unsigned int s, int slot);
74 void emitForm_MAD(const Instruction *);
[all...] |
| nv50_ir.cpp | 101 Instruction *insn = src->value->getUniqueInsn();
173 if (!insn || !insn->bb) // Unbound instruction ?
180 Instruction *insn = (*it)->getInsn();
276 Instruction *insn = getInsn();
552 void Instruction::init()
582 Instruction::Instruction()
593 Instruction::Instruction(Function *fn, operation opr, DataType ty)
603 Instruction::~Instruction(
[all...] |
| nv50_ir_inlines.h | 176 Instruction *Value::getInsn() const
181 Instruction *Value::getUniqueInsn() const
207 inline bool Instruction::constrainedDefs() const
212 Value *Instruction::getIndirect(int s, int dim) const
217 Value *Instruction::getPredicate() const
222 void Instruction::setFlagsDef(int d, Value *val)
236 void Instruction::setFlagsSrc(int s, Value *val)
252 CmpInstruction *Instruction::asCmp()
259 const CmpInstruction *Instruction::asCmp() const
266 FlowInstruction *Instruction::asFlow(
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_fpc_optimize.c | 173 memcpy(&o->Instruction, &i->Instruction, sizeof(o->Instruction));
204 op_commutes(current->FullInstruction.Instruction.Opcode) &&
205 current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
206 next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
214 next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
219 op_neutral_element(current->FullInstruction.Instruction.Opcode));
228 op_commutes(current->FullInstruction.Instruction.Opcode) &
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| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_fpc_optimize.c | 173 memcpy(&o->Instruction, &i->Instruction, sizeof(o->Instruction));
204 op_commutes(current->FullInstruction.Instruction.Opcode) &&
205 current->FullInstruction.Instruction.Saturate == next->FullInstruction.Instruction.Saturate &&
206 next->FullInstruction.Instruction.Opcode == TGSI_OPCODE_MOV &&
214 next->FullInstruction.Instruction.Opcode = TGSI_OPCODE_NOP;
219 op_neutral_element(current->FullInstruction.Instruction.Opcode));
228 op_commutes(current->FullInstruction.Instruction.Opcode) &
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| /external/llvm/include/llvm/CodeGen/ |
| MachineBasicBlock.h | 414 /// PHINode instruction. When adding instruction to the beginning of the
416 /// the first instruction, which might be PHI.
417 /// Returns end() is there's no non-PHI instruction.
420 /// SkipPHIsAndLabels - Return the first instruction in MBB after I that is
426 /// instruction of this basic block. If a terminator does not exist,
436 /// instruction in the basic block, or end()
452 /// Insert MI into the instruction list before I, possibly inside a bundle.
460 /// Insert a range of instructions into the instruction list before I.
466 /// Insert MI into the instruction list before I
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| /external/valgrind/main/none/tests/mips32/ |
| branches.c | 114 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \
121 instruction" $" #RS ", $" #RT ", end"instruction#RDval"\n\t" \
124 "end"instruction#RDval":\n\t" \
131 printf(instruction" :: %d, RSval: %d, RTval: %d\n", \
135 #define TESTINST5(instruction, RDval, RSval, RD, RS) \
141 instruction" $" #RS ", end"instruction#RDval"\n\t" \
144 "end"instruction#RDval":\n\t" \
151 printf(instruction" :: %d, RSval: %d\n",
[all...] |
| /external/llvm/include/llvm/Support/ |
| CallSite.h | 42 typename InstrTy = const Instruction,
56 /// will create an appropriate call site for a Call or Invoke instruction, but
62 if (II->getOpcode() == Instruction::Call)
64 else if (II->getOpcode() == Instruction::Invoke)
72 /// it also could signify a NULL Instruction pointer.
86 assert(getInstruction() && "Not a call or invoke instruction!");
100 assert(getInstruction() && "Not a call or invoke instruction!");
117 assert(getInstruction() && "Not a call or invoke instruction!");
125 assert(getInstruction() && "Not a call or invoke instruction!");
138 assert(getInstruction() && "Not a call or invoke instruction!");
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| SsaInsn.java | 27 * An instruction in SSA form
192 * instruction, or null if no local variable assignment occurs. This
210 * used as sources for this instruction.
224 * @return {@code non-null;} a ROP representation of this instruction, with
245 * move-exception) instruction
252 * @return true if this is a move-exception instruction.
260 * @return true if this instruction can throw.
276 * Any non-phi move instruction
277 * @param insn {@code non-null;} the instruction to visit
283 * @param insn {@code non-null;} the instruction to visi
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| header.S | 60 r7 rINST first 16-bit code unit of current instruction
61 r8 rIBASE interpreted instruction base pointer, used for computed goto
64 one instruction to make instruction-counting easier. They MUST NOT alter
104 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
109 * Fetch the next instruction from the specified offset. Advances rPC
110 * to point to the next instruction. "_count" is in 16-bit code units.
130 * Fetch the next instruction from an offset specified by _reg. Updates
131 * rPC to point to the next instruction. "_reg" must specify the distance
158 * Put the instruction's opcode field into the specified register
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| /external/chromium/sdch/open-vcdiff/src/ |
| instruction_map.h | 36 // optimizes for fast encoding, that is, for taking a delta instruction
37 // inst (also known as instruction type), size, and mode and arriving at
44 // to create the instruction->opcode mappings. The caller *must* have
47 // max_mode is the maximum value for the mode of a COPY instruction.
55 // instruction and NOOP for its second instruction (or vice versa.)
74 // lookupFirstOpcode), finds an opcode that has the same first instruction as
76 // instruction.
128 // VCD_COPY being the last instruction type. The inst+mode values are:
143 // for each possible first instruction size (size1) in the code table
[all...] |
| /external/chromium_org/sandbox/win/src/sidestep/ |
| preamble_patcher_with_stub.cpp | 84 // bytes for our jmp instruction, so let's find the minimum number of
92 ASSERT(false, (L"Unable to patch because there is a jump instruction "
99 ASSERT(false, (L"Disassembler encountered unsupported instruction "
121 // Now, make a jmp instruction to the rest of the target function (minus the
123 // find address to jump to, relative to next address after jmp instruction
131 // jmp (Jump near, relative, displacement relative to next instruction)
143 // (Jump near, relative, displacement relative to next instruction)
146 // Find offset from instruction after jmp, to the replacement function.
153 // complete the jmp instruction
169 // jump instruction that jumps over to the preamble_stub. The preambl
[all...] |
