/art/compiler/sea_ir/ir/ |
instruction_nodes.h | 30 UNNAMED_CONST_REGISTER = -3 // Written by UnnamedConst* instructions, read by *Lit* instruction. 35 // This class represents an instruction in SEA IR. 41 static std::vector<sea_ir::InstructionNode*> Create(const art::Instruction* in); 42 // Returns the Dalvik instruction around which this InstructionNode is wrapped. 43 const art::Instruction* GetInstruction() const { 44 DCHECK(NULL != instruction_) << "Tried to access NULL instruction in an InstructionNode."; 47 // Returns the register that is defined by the current instruction, or NO_REGISTER otherwise. 49 // Returns the set of registers defined by the current instruction. 51 // Returns the set of register numbers that are used by the instruction. 53 // Mark the current instruction as a downward exposed definition [all...] |
/art/runtime/ |
dex_instruction_visitor.h | 33 const Instruction* inst = Instruction::At(&code[i]); 36 case Instruction::cname: { \ 52 // Specific handlers for each instruction. 54 void Do_ ## cname(const Instruction* inst) { \ 63 // The default instruction handler. 64 void Do_Default(const Instruction*) {
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
nv50_ir_target_nv50.h | 47 virtual bool insnCanLoad(const Instruction *insn, int s, 48 const Instruction *ld) const; 51 virtual bool isModSupported(const Instruction *, int s, Modifier) const; 52 virtual bool isSatSupported(const Instruction *) const; 53 virtual bool mayPredicate(const Instruction *, const Value *) const; 55 virtual int getLatency(const Instruction *) const; 56 virtual int getThroughput(const Instruction *) const;
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/external/lzma/C/ |
BraIA64.c | 29 UInt64 instruction, instNorm;
local 35 instruction = 0;
37 instruction += (UInt64)data[i + j + bytePos] << (8 * j);
39 instNorm = instruction >> bitRes;
59 instruction &= (1 << bitRes) - 1;
60 instruction |= (instNorm << bitRes);
62 data[i + j + bytePos] = (Byte)(instruction >> (8 * j));
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
nv50_ir_target_nv50.h | 47 virtual bool insnCanLoad(const Instruction *insn, int s, 48 const Instruction *ld) const; 51 virtual bool isModSupported(const Instruction *, int s, Modifier) const; 52 virtual bool isSatSupported(const Instruction *) const; 53 virtual bool mayPredicate(const Instruction *, const Value *) const; 55 virtual int getLatency(const Instruction *) const; 56 virtual int getThroughput(const Instruction *) const;
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/external/llvm/include/llvm/ |
InstVisitor.h | 1 //===- llvm/InstVisitor.h - Instruction visitor templates -------*- C++ -*-===// 24 // We operate on opaque instruction classes, so forward declare all instruction 28 #include "llvm/IR/Instruction.def" 35 /// @brief Base class for instruction visitors 37 /// Instruction visitors are used when you want to perform different actions 64 /// The defined has 'visit' methods for Instruction, and also for BasicBlock, 67 /// Note that if you don't implement visitXXX for some instruction type, 68 /// the visitXXX method for instruction superclass will be invoked. So 72 /// The optional second template argument specifies the type that instruction [all...] |
/external/proguard/src/proguard/optimize/peephole/ |
BranchTargetFinder.java | 28 import proguard.classfile.instruction.*; 29 import proguard.classfile.instruction.visitor.InstructionVisitor; 33 * This AttributeVisitor finds all instruction offsets, branch targets, and 54 private static final short INSTRUCTION = 1 << 0; 82 * Returns whether there is an instruction at the given offset in the 87 return (instructionMarks[offset] & INSTRUCTION) != 0; 92 * Returns whether the instruction at the given offset is the target of 106 * Returns whether the instruction at the given offset is the origin of a 107 * branch instruction in the CodeAttribute that was visited most recently. 116 * Returns whether the instruction at the given offset is the target of [all...] |
GotoReturnReplacer.java | 26 import proguard.classfile.instruction.*; 27 import proguard.classfile.instruction.visitor.InstructionVisitor; 72 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {} 77 // Check if the instruction is an unconditional goto instruction. 82 // Check if the goto instruction points to a return instruction. 88 Instruction targetInstruction = InstructionFactory.create(codeAttribute.code, 98 // Replace the goto instruction by the return instruction [all...] |
/external/llvm/include/llvm/CodeGen/ |
ScheduleHazardRecognizer.h | 22 /// HazardRecognizer - This determines whether or not an instruction can be 38 NoHazard, // This instruction can be emitted at this cycle. 39 Hazard, // This instruction can't be emitted at this cycle. 40 NoopHazard // This instruction can't be emitted, and needs noops. 55 /// * NoHazard: it is legal to issue this instruction on this cycle. 56 /// * Hazard: issuing this instruction would stall the machine. If some 57 /// other instruction is available, issue it first. 58 /// * NoopHazard: issuing this instruction would break the program. If 59 /// some other instruction can be issued, do so, otherwise issue a noop. 69 /// EmitInstruction - This callback is invoked when an instruction i [all...] |
/external/llvm/lib/Target/Mips/ |
MipsOs16.cpp | 56 const Instruction &Inst = *I; 58 case Instruction::FAdd: 59 case Instruction::FSub: 60 case Instruction::FMul: 61 case Instruction::FDiv: 62 case Instruction::FRem: 63 case Instruction::FPToUI: 64 case Instruction::FPToSI: 65 case Instruction::UIToFP: 66 case Instruction::SIToFP [all...] |
/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/ |
InstructionIterator.java | 50 Instruction instruction = null; local 55 instruction = new UnknownInstruction(opcodeValue); 62 instruction = new Instruction10x(Opcode.NOP, insns, insnsPosition); 67 instruction = new PackedSwitchDataPseudoInstruction(insns, insnsPosition); 72 instruction = new SparseSwitchDataPseudoInstruction(insns, insnsPosition); 77 instruction = new ArrayDataPseudoInstruction(insns, insnsPosition); 82 instruction = opcode.format.Factory.makeInstruction(dexFile, opcode, insns, insnsPosition); 86 assert instruction != null; 88 delegate.ProcessInstruction(insnsPosition/2, instruction); [all...] |
/external/llvm/tools/llvm-diff/ |
DiffLog.h | 21 class Instruction; 58 typedef std::pair<Instruction*,Instruction*> DiffRecord; 67 void addMatch(Instruction *L, Instruction *R); 69 void addLeft(Instruction *L); 70 void addRight(Instruction *R); 74 Instruction *getLeft(unsigned I) const; 75 Instruction *getRight(unsigned I) const;
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/external/llvm/unittests/Transforms/Utils/ |
IntegerDivision.cpp | 41 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SDiv); 46 EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); 48 Instruction* Quotient = dyn_cast<Instruction>(cast<User>(Ret)->getOperand(0)); 49 EXPECT_TRUE(Quotient && Quotient->getOpcode() == Instruction::Sub); 71 EXPECT_TRUE(BB->front().getOpcode() == Instruction::UDiv); 76 EXPECT_TRUE(BB->front().getOpcode() == Instruction::ICmp); 78 Instruction* Quotient = dyn_cast<Instruction>(cast<User>(Ret)->getOperand(0)); 79 EXPECT_TRUE(Quotient && Quotient->getOpcode() == Instruction::PHI) [all...] |
/external/oprofile/events/mips/vr5500/ |
events | 8 event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction 9 event:0x3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction 10 event:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction 11 event:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction 15 event:0x9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache miss
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/external/proguard/src/proguard/classfile/instruction/visitor/ |
InstructionCounter.java | 21 package proguard.classfile.instruction.visitor; 25 import proguard.classfile.instruction.Instruction; 55 Instruction instruction)
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/external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/ |
PreInstructionRegisterInfoMethodItem.java | 96 RegisterRangeInstruction instruction = (RegisterRangeInstruction)analyzedInstruction.getInstruction(); local 98 registers.set(instruction.getStartRegister(), 99 instruction.getStartRegister() + instruction.getRegCount()); 101 FiveRegisterInstruction instruction = (FiveRegisterInstruction)analyzedInstruction.getInstruction(); local 102 int regCount = instruction.getRegCount(); 105 registers.set(instruction.getRegisterA()); 108 registers.set(instruction.getRegisterG()); 111 registers.set(instruction.getRegisterF()); 114 registers.set(instruction.getRegisterE()) 120 ThreeRegisterInstruction instruction = (ThreeRegisterInstruction)analyzedInstruction.getInstruction(); local 125 TwoRegisterInstruction instruction = (TwoRegisterInstruction)analyzedInstruction.getInstruction(); local 129 SingleRegisterInstruction instruction = (SingleRegisterInstruction)analyzedInstruction.getInstruction(); local [all...] |
/art/compiler/dex/ |
mir_optimization.cc | 54 case Instruction::CONST_4: 55 case Instruction::CONST_16: 56 case Instruction::CONST: 59 case Instruction::CONST_HIGH16: 62 case Instruction::CONST_WIDE_16: 63 case Instruction::CONST_WIDE_32: 66 case Instruction::CONST_WIDE: 69 case Instruction::CONST_WIDE_HIGH16: 135 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) || 136 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) | [all...] |
/art/compiler/sea_ir/debug/ |
dot_gen.cc | 44 void DotGenerationVisitor::ToDotSSAEdges(InstructionNode* instruction) { 45 std::map<int, InstructionNode*>* definition_edges = instruction->GetSSAProducersMap(); 52 dot_text_ += instruction->StringId() + "[color=gray,label=\""; 67 std::vector<InstructionNode*>* used_in = instruction->GetSSAConsumers(); 70 dot_text_ += (*cit)->StringId() + " -> " + instruction->StringId() + "[color=gray,label=\""; 76 void DotGenerationVisitor::ToDotSSAEdges(PhiInstructionNode* instruction) { 77 std::vector<InstructionNode*> definition_edges = instruction->GetSSAProducers(); 84 dot_text_ += instruction->StringId() + "[color=gray,label=\""; 85 dot_text_ += art::StringPrintf("vR = %d", instruction->GetRegisterNumber()); 99 std::vector<InstructionNode*>* used_in = instruction->GetSSAConsumers() [all...] |
/external/proguard/src/proguard/classfile/instruction/ |
ConstantInstruction.java | 21 package proguard.classfile.instruction; 27 import proguard.classfile.instruction.visitor.InstructionVisitor; 31 * This Instruction represents an instruction that refers to an entry in the 36 public class ConstantInstruction extends Instruction 77 * Copies the given instruction into this instruction. 78 * @param constantInstruction the instruction to be copied. 79 * @return this instruction. 91 // Implementations for Instruction [all...] |
/external/proguard/src/proguard/optimize/evaluation/ |
EvaluationShrinker.java | 29 import proguard.classfile.instruction.*; 30 import proguard.classfile.instruction.visitor.InstructionVisitor; 169 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 172 instruction.accept(clazz, method, codeAttribute, offset, unusedParameterSimplifier); 196 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 199 // Mark that the instruction is necessary if it is an infinite loop. 200 if (instruction.opcode == InstructionConstants.OP_GOTO && 201 ((BranchInstruction)instruction).branchOffset == 0 238 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 309 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 365 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 382 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 411 Instruction instruction = InstructionFactory.create(codeAttribute.code, local [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_MONITOR_EXIT.S | 8 * if they happened at the following instruction. See the Dalvik 9 * instruction spec. 23 GOTO_OPCODE(ip) @ jump to next instruction
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unop.S | 4 * specifies an instruction that performs "result = op r0". 5 * This could be an ARM instruction or a function call. 20 GOTO_OPCODE(ip) @ jump to next instruction
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/dalvik/vm/mterp/armv6t2/ |
unop.S | 4 * specifies an instruction that performs "result = op r0". 5 * This could be an ARM instruction or a function call. 19 GOTO_OPCODE(ip) @ jump to next instruction
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/dalvik/vm/mterp/c/ |
OP_MONITOR_EXIT.cpp | 14 * instruction, not the current instruction (see the Dalvik 16 * we're not actually at risk of skipping an instruction
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/dalvik/vm/mterp/mips/ |
OP_MONITOR_EXIT.S | 8 * if they happened at the following instruction. See the Dalvik 9 * instruction spec. 23 GOTO_OPCODE(t0) # jump to next instruction
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