HomeSort by relevance Sort by last modified time
    Searched full:interrupt (Results 51 - 75 of 1559) sorted by null

1 23 4 5 6 7 8 91011>>

  /external/kernel-headers/original/linux/
mc146818rtc.h 71 # define RTC_PIE 0x40 /* periodic interrupt enable */
72 # define RTC_AIE 0x20 /* alarm interrupt enable */
73 # define RTC_UIE 0x10 /* update-finished interrupt enable */
serial_reg.h 23 #define UART_IER 1 /* Out: Interrupt Enable Register */
24 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
25 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
27 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
33 #define UART_IIR 2 /* In: Interrupt ID Register */
35 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
36 #define UART_IIR_MSI 0x00 /* Modem status interrupt */
38 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */
39 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
114 #define UART_LSR_BI 0x10 /* Break interrupt indicator *
    [all...]
kxtf9.h 63 /* INTERRUPT CONTROL REGISTER 1 BITS */
64 #define IEN 0x20 /* interrupt enable */
65 #define IEA 0x10 /* interrupt polarity */
66 #define IEL 0x08 /* interrupt response */
preempt.h 6 * preempt_count (used for kernel preemption, interrupt count, etc.)
  /external/qemu-pc-bios/bochs/bios/
notes 29 > Drive then generates an interrupt to the system.
35 the busy bit to 0, and generates an interrupt.
42 and generates an interrupt. When the system has tranferred the last sector,
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/
serial_reg.h 23 #define UART_IER 1 /* Out: Interrupt Enable Register */
24 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
25 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
27 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
33 #define UART_IIR 2 /* In: Interrupt ID Register */
35 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
36 #define UART_IIR_MSI 0x00 /* Modem status interrupt */
38 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */
39 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
116 #define UART_LSR_BI 0x10 /* Break interrupt indicator *
    [all...]
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/
serial_reg.h 23 #define UART_IER 1 /* Out: Interrupt Enable Register */
24 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
25 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
27 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
33 #define UART_IIR 2 /* In: Interrupt ID Register */
35 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
36 #define UART_IIR_MSI 0x00 /* Modem status interrupt */
38 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */
39 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
116 #define UART_LSR_BI 0x10 /* Break interrupt indicator *
    [all...]
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/
serial_reg.h 23 #define UART_IER 1 /* Out: Interrupt Enable Register */
24 #define UART_IER_MSI 0x08 /* Enable Modem status interrupt */
25 #define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */
27 #define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
33 #define UART_IIR 2 /* In: Interrupt ID Register */
35 #define UART_IIR_ID 0x06 /* Mask for the interrupt ID */
36 #define UART_IIR_MSI 0x00 /* Modem status interrupt */
38 #define UART_IIR_RDI 0x04 /* Receiver data interrupt */
39 #define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */
116 #define UART_LSR_BI 0x10 /* Break interrupt indicator *
    [all...]
  /art/test/050-sync-test/src/
Main.java 41 System.out.println("INTERRUPT!");
58 System.out.println("INTERRUPT!");
70 System.out.println("INTERRUPT!");
180 mOther.interrupt();
  /dalvik/tests/050-sync-test/src/
Main.java 27 System.out.println("INTERRUPT!");
44 System.out.println("INTERRUPT!");
56 System.out.println("INTERRUPT!");
166 mOther.interrupt();
  /development/samples/USB/MissileLauncher/
_index.html 9 <li>Receiving packets on an interrupt endpoint using a thread that calls
  /external/chromium_org/third_party/WebKit/ManualTests/
invalid-mouse-event.html 8 <li>If Safari doesn't crash in a while, interrupt the test by pressing Cmd+W.</li>
  /external/kernel-headers/original/asm-arm/
dma.h 58 * Some architectures may need to do allocate an interrupt
64 * Some architectures may need to do free an interrupt
71 * enabling an interrupt and setting the DMA registers.
78 * disabling an interrupt or whatever.
  /external/kernel-headers/original/asm-x86/
irq_32.h 48 /* Interrupt vector management */
  /external/oprofile/module/
oprofile.h 92 * A interrupt handler must implement these routines.
93 * When an interrupt arrives, it must eventually call
97 /* initialise the interrupt handler on module load.
140 /* used by interrupt handlers if the underlined harware doesn't support
  /external/qemu/android/config/linux-x86/asm/
kvm.h 23 /* Architectural interrupt line count. */
37 __u8 irr; /* interrupt request register */
38 __u8 imr; /* interrupt mask register */
39 __u8 isr; /* interrupt service register */
  /external/qemu/android/config/linux-x86_64/asm/
kvm.h 23 /* Architectural interrupt line count. */
37 __u8 irr; /* interrupt request register */
38 __u8 imr; /* interrupt mask register */
39 __u8 isr; /* interrupt service register */
  /external/qemu/hw/
arm-misc.h 14 /* The CPU is also modeled as an interrupt controller. */
arm_pic.c 2 * Generic ARM Programmable Interrupt Controller support.
  /external/valgrind/main/gdbserver_tests/
mcinfcallRU.stdinB.gdb 6 # We will interrupt in a few seconds (be sure the main task is ready).
  /art/test/033-class-init-deadlock/src/
Main.java 40 thread1.interrupt();
41 thread2.interrupt();
  /external/chromium_org/third_party/libusb/
libusb.gyp 16 'src/libusb/interrupt.c',
17 'src/libusb/interrupt.h',
  /external/kernel-headers/original/asm-mips/
jazz.h 146 * JAZZ timer registers and interrupt no.
147 * Note that the hardware timer interrupt is actually on
182 * JAZZ interrupt control registers
188 * JAZZ Interrupt Level definitions
191 * we remap the Jazz interrupts to the usual ISA style interrupt numbers.
250 #define JAZZ_R4030_IRQ_ENABLE 0xE00000E8 /* Internal Interrupt Enable */
252 #define JAZZ_R4030_IRQ_SOURCE 0xE0000200 /* Interrupt Source Register */
258 #define JAZZ_EISA_IRQ_ACK 0xE0000238 /* EISA interrupt acknowledge */
  /external/robolectric/src/test/java/com/xtremelabs/robolectric/bytecode/
ClassCacheTest.java 42 locker.interrupt();
81 locker.interrupt();
  /frameworks/base/core/java/android/os/
SystemClock.java 69 * be interrupted with {@link Thread#interrupt Thread.interrupt()}, and
75 * you do not use {@link Thread#interrupt Thread.interrupt()}, as it will
102 * {@link InterruptedException}; {@link Thread#interrupt()} events are
124 // Important: we don't want to quietly eat an interrupt() event,
125 // so we make sure to re-interrupt the thread so that the next
127 Thread.currentThread().interrupt();

Completed in 2479 milliseconds

1 23 4 5 6 7 8 91011>>