/external/chromium_org/v8/src/mips/ |
assembler-mips.cc | 1629 void Assembler::lwc1(FPURegister fd, const MemOperand& src) { function in class:v8::Assembler [all...] |
disasm-mips.cc | 917 case LWC1: 918 Format(instr, "lwc1 'ft, 'imm16s('rs)");
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constants-mips.h | 297 LWC1 = ((6 << 3) + 1) << kOpcodeShift,
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assembler-mips.h | 750 void lwc1(FPURegister fd, const MemOperand& src); [all...] |
simulator-mips.cc | [all...] |
/external/llvm/test/MC/Disassembler/Mips/ |
mips32.txt | 239 # CHECK: lwc1 $f9, 9158($7)
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mips32_le.txt | 239 # CHECK: lwc1 $f9, 9158($7)
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mips32r2.txt | 248 # CHECK: lwc1 $f9, 9158($7)
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mips32r2_le.txt | 248 # CHECK: lwc1 $f9, 9158($7)
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/external/v8/src/ |
deoptimizer.h | 381 // non-64-bit aligned double. Uses two lwc1 instructions.
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/external/v8/src/mips/ |
assembler-mips.cc | 1622 void Assembler::lwc1(FPURegister fd, const MemOperand& src) { function in class:v8::Assembler [all...] |
disasm-mips.cc | 907 case LWC1: 908 Format(instr, "lwc1 'ft, 'imm16s('rs)");
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constants-mips.h | 294 LWC1 = ((6 << 3) + 1) << kOpcodeShift,
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assembler-mips.h | 794 void lwc1(FPURegister fd, const MemOperand& src); [all...] |
simulator-mips.cc | [all...] |
/art/compiler/utils/mips/ |
assembler_mips.cc | 409 void MipsAssembler::Lwc1(FRegister ft, Register rs, uint16_t imm16) { 516 Lwc1(reg, base, offset); [all...] |
/art/compiler/dex/quick/mips/ |
mips_lir.h | 385 kMipsFlwc1, // lwc1 t,o(b) [110001] b[25..21] t[20..16] o[15..0].
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assemble_mips.cc | 376 "lwc1", "!0s,!1d(!2r)", 4), [all...] |
/dalvik/vm/compiler/codegen/mips/ |
MipsLIR.h | 479 kMipsFlwc1, /* lwc1 t,o(b) [110001] b[25..21] t[20..16] o[15..0] */
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Assemble.cpp | 373 "lwc1", "!0s,!1d(!2r)", 2), [all...] |
/system/core/libpixelflinger/codeflinger/ |
mips_disassem.c | 75 /*48 */ "ll ", "lwc1", "lwc2", "lwc3", "lld", "ldc1", "ldc2", "ld ",
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/external/valgrind/main/VEX/priv/ |
guest_mips_toIR.c | [all...] |
host_mips_defs.c | [all...] |
/external/qemu/ |
mips-dis.c | [all...] |
/prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/bin/ |
mipsel-linux-android-run | |