/external/llvm/test/CodeGen/Mips/ |
select.ll | 8 ; CHECK: movn 16 ; CHECK: movn.s 24 ; CHECK: movn.d
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/dalvik/vm/arch/mips/ |
CallO32.S | 251 movn $v0,$t0,$t2 /* If the result type is float or double overwrite $v1/$v0 */ 252 movn $v1,$t1,$t2 255 movn $v1,$t0,$t2 /* If the result type is float or double overwrite $v0/$v1 */ 256 movn $v0,$t1,$t2 258 movn $v0,$t0,$t3 /* If the result type is float overwrite $v0 */
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/bionic/libc/kernel/arch-mips/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/dalvik/vm/compiler/template/mips/ |
TEMPLATE_RETURN.S | 58 movn t2, zero, t1 # check the breadFlags and
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/frameworks/native/opengl/libagl/arch-mips/ |
fixed_asm.S | 50 movn $v0,$t2,$t0 /* if negative? */
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
asm.h | 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 70 #define MOVN(rd, rs, rt) movn rd, rs, rt
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 461 // should convert between MOVN and MOVZ to achieve our goals). 467 // Bit 30 converts the MOVN encoding into a MOVZ 470 // MCCodeEmitter should have encoded a MOVN, which is fine. 488 // should convert between MOVN and MOVZ to achieve our goals). 494 // Bit 30 converts the MOVN encoding into a MOVZ 511 // we should convert between MOVN and MOVZ to achieve our goals). 517 // Bit 30 converts the MOVN encoding into a MOVZ
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AArch64MCCodeEmitter.cpp | 444 // eventual result could be either a MOVZ or a MOVN. It's the MCCodeEmitter's 446 // must zero out bit 30 (essentially emitting a MOVN).
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/external/valgrind/main/none/tests/mips32/ |
MIPS32int.c | 507 printf("MOVN\n"); 508 TESTINST1("movn $t0, $t1, $t2", 0x31415927, 0, t0, t1, t2); 509 TESTINST1("movn $t0, $t1, $t2", 0x31415927, 1, t0, t1, t2); 510 TESTINST1("movn $t0, $t1, $t2", 0, 255, t0, t1, t2); 511 TESTINST1("movn $t0, $t1, $t2", -1, 0, t0, t1, t2); 512 TESTINST1("movn $t0, $t1, $t2", 0, 1, t0, t1, t2); 513 TESTINST1("movn $t0, $t1, $t2", 0, 0, t0, t1, t2); 514 TESTINST1("movn $t0, $t1, $t2", 0x80000000, -1, t0, t1, t2); 515 TESTINST1("movn $t0, $t1, $t2", 0x80000000, 1, t0, t1, t2); 516 TESTINST1("movn $t0, $t1, $t2", 0x7fffffff, 1, t0, t1, t2) [all...] |
MIPS32int.stdout.exp | 352 MOVN 353 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0x00000000 354 movn $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0x00000001 355 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 356 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000 357 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 358 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 359 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xffffffff 360 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000001 361 movn $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x0000000 [all...] |
MIPS32int.stdout.exp-BE | 352 MOVN 353 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0x00000000 354 movn $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0x00000001 355 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 356 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000 357 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 358 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 359 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xffffffff 360 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000001 361 movn $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x0000000 [all...] |
MIPS32int.stdout.exp-mips32 | 332 MOVN 333 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0x00000000 334 movn $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0x00000001 335 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff 336 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000 337 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001 338 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000 339 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xffffffff 340 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000001 341 movn $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x0000000 [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSubtarget.h | 81 // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
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/art/runtime/arch/mips/ |
quick_entrypoints_mips.S | [all...] |
/external/chromium_org/v8/src/mips/ |
constants-mips.cc | 276 case MOVN:
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/external/v8/src/mips/ |
constants-mips.cc | 272 case MOVN:
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/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 524 movn t2, zero, t1 # check the breadFlags and [all...] |
/art/runtime/ |
disassembler_mips.cc | 65 { kRTypeMask | (0x1f << 6), 11, "movn", "DST", },
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/external/llvm/test/MC/AArch64/ |
basic-a64-diagnostics.s | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | 211 // use a 32-bit instruction: "movn w0, 0xedbc". 514 // tuning may change this to a sequence of MOVZ/MOVN/MOVK instructions.
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