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  /external/llvm/test/CodeGen/ARM/
2011-08-25-ldmia_ret.ll 35 ; CHECK: movs [[RRET:r.]], #2
arm-and-tst-peephole.ll 29 ; THUMB: movs r[[R0:[0-9]+]], #3
avoid-cpsr-rmw.ll 94 ; CHECK-NOT: movs
fast-isel-select.ll 13 ; THUMB: movs r{{[1-9]}}, #10
memcpy-inline.ll 78 ; CHECK: movs [[REG5:r[0-9]+]], #0
  /system/core/libpixelflinger/
col32cb16blend_neon.S 47 movs r3, r2, lsr #4 // calc. sixteens iterations
  /external/valgrind/main/none/tests/arm/
v6intARM.c 15 "movs %3,%3;" \
47 "movs %4,%4;" \
76 "movs %5,%5;" \
107 "movs %7,%7;" \
149 TESTINST2("movs r0, r1", 1, r0, r1, c);
150 TESTINST2("movs r0, r1", 0, r0, r1, c);
151 TESTINST2("movs r0, r1", 0x80000000, r0, r1, c);
152 TESTINST2("movs r0, #0", 0, r0, r1, c);
153 TESTINST2("movs r0, #1", 0, r0, r1, c);
    [all...]
v6intARM.stdout.exp 6 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
7 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z
8 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 0, cpsr 0x80000000 N
9 movs r0, #0 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x40000000 Z
10 movs r0, #1 :: rd 0x00000001 rm 0x00000000, carryin 0, cpsr 0x00000000
11 movs r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 1, cpsr 0x20000000 C
12 movs r0, r1 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC
13 movs r0, r1 :: rd 0x80000000 rm 0x80000000, carryin 1, cpsr 0xa0000000 N C
14 movs r0, #0 :: rd 0x00000000 rm 0x00000000, carryin 1, cpsr 0x60000000 ZC
15 movs r0, #1 :: rd 0x00000001 rm 0x00000000, carryin 1, cpsr 0x20000000 C
    [all...]
  /external/llvm/lib/Target/ARM/
ARM.td 100 def FeatureAvoidMOVsShOp : SubtargetFeature<"avoid-movs-shop",
102 "Avoid movs instructions with shifter operand">;
ARMSubtarget.h 139 /// movs with shifter operand (i.e. asr, lsl, lsr).
  /external/llvm/lib/Target/X86/
X86Schedule.td 192 //sign extension movs
198 //zero extension movs
X86ScheduleAtom.td 135 //sign extension movs
141 //zero extension movs
301 // MMX MOVs
  /external/aac/libSBRdec/src/arm/
env_calc_arm.cpp 118 MOVS r3, r3, ASR #1
  /external/chromium_org/third_party/skia/include/core/
SkFixed.h 200 asm("movs %1, %3, lsl #1 \n"
  /external/llvm/test/CodeGen/Thumb2/
machine-licm.ll 89 ; CHECK: movs {{(r[0-9]+)|(lr)}}, #0
thumb2-mov.ll 224 ; CHECK: movs r0, #171
  /external/skia/include/core/
SkFixed.h 200 asm("movs %1, %3, lsl #1 \n"
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/
R4R8First_v5.s 30 movs r10, r1
Radix4FFT_v5.s 161 movs r1, r1, asr #2
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/
Radix4FFT_v7.s 140 movs r1, r1, asr #2
  /external/qemu/
i386-dis.c 885 { "movS", { Ev, Gv } },
    [all...]
  /dalvik/vm/compiler/codegen/x86/libenc/
enc_defs_ext.h 243 // MOVS is a special case: see encoding table for more details,
  /external/chromium_org/third_party/openssl/openssl/patches/
neon_runtime.patch 242 + movs r6, #0
249 + movs r4, #10
730 + movs r3, #10
808 + movs r3, #10
  /external/libvpx/libvpx/examples/includes/geshi/geshi/
asm.php 66 'movs','movsb','movsw','mul','neg','nop','not','or','out','pop','popf','push','pushf',
  /external/llvm/utils/TableGen/
X86RecognizableInstr.h 93 /// Indicates whether the instruction has FR operands - MOVs with FR operands

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