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  /external/qemu-pc-bios/vgabios/tests/
testbios.c 27 Bit16u msr; member in struct:__anon25754
277 biosarea->msr=peekb(0x40,0x65);
303 printf("msr : %04x\n",biosarea->msr);
  /external/valgrind/main/coregrind/m_gdbserver/
power-core.xml 44 <reg name="msr" bitsize="32" type="uint32"/>
power64-core.xml 44 <reg name="msr" bitsize="64" type="uint64"/>
  /sdk/emulator/qtools/
opcode.cpp 138 "msr",
  /external/stressapptest/src/
os.cc 742 // Open dev msr.
745 snprintf(buf, sizeof(buf), "/dev/cpu/%d/msr", core);
753 logprintf(5, "Log: can't seek to msr %x, cpu %d\n", address, core);
765 // Read from the msr.
769 logprintf(5, "Log: Failed to read msr %x core %d\n", address, core);
781 // Write to the msr
785 logprintf(5, "Log: Failed to write msr %x core %d\n", address, core);
  /external/oprofile/daemon/
opd_ibs.h 38 * Each field corresponds to a model-specific register (MSR.) See the
opd_ibs_macro.h 36 * IBS op event flags and values at the MSR level.
262 * representation .It hides the MSR layout of IBS op data.
  /external/oprofile/module/x86/
op_model_athlon.c 3 * athlon / K7 model-specific MSR operations
op_model_ppro.c 3 * pentium pro / P6 model-specific MSR operations
op_apic.c 115 /* enable local APIC via MSR. Forgetting this is a fun way to
  /external/llvm/test/CodeGen/SystemZ/
insert-05.ll 193 ; CHECK: msr %r2, %r2
205 ; CHECK: msr %r2, %r2
  /external/llvm/test/MC/ARM/
diagnostics.s 365 @ Bad operands for msr
366 msr #0, #0
367 msr foo, #0
369 @ CHECK-ERRORS: msr #0, #0
372 @ CHECK-ERRORS: msr foo, #0
basic-arm-instructions.s     [all...]
  /external/llvm/test/MC/Disassembler/ARM/
thumb-tests.txt 134 # CHECK: msr CPSR_fc, r0
302 # CHECK: msr CPSR_fc, r0
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/elf/tests/
elfmanysym.asm 12 msr: label
  /external/eigen/bench/btl/generic_bench/timers/
x86_timer.hh 29 #include <asm/msr.h>
  /external/elfutils/backends/
ppc_corenote.c 52 GR (33, 1, 66), /* msr */
ppc_regs.c 102 return stpcpy (name, "msr") + 1 - name;
  /external/kernel-headers/original/asm-x86/
cpufeature_32.h 38 #define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */
msr-index.h 4 /* CPU model specific register (MSR) numbers */
  /external/libgsm/inc/
private.h 34 word msr; /* decoder.c, Postprocessing */ member in struct:gsm_state
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/
msr-index.h 4 /* CPU model specific register (MSR) numbers */
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/
msr-index.h 4 /* CPU model specific register (MSR) numbers */
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/
msr-index.h 4 /* CPU model specific register (MSR) numbers */
  /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/
processor_32.h 22 #include <asm/msr.h>

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