/external/libvpx/libvpx/vpx_ports/ |
arm.h | 21 /*ARMv7 optional NEON instructions.*/
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/external/llvm/test/CodeGen/ARM/ |
2009-09-09-AllOnes.ll | 1 ; RUN: llc -mattr=+neon < %s
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2009-09-22-LiveVariablesBug.ll | 1 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+neon
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2009-09-24-spill-align.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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2010-06-29-SubregImpDefs.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon
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2011-11-07-PromoteVectorLoadStore.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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fnmuls.ll | 2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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opt-shuff-tstore.ll | 1 ; RUN: llc -mcpu=cortex-a9 -mtriple=arm-linux-unknown -mattr=+neon < %s | FileCheck %s
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v1-constant-fold.ll | 1 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+v7,+vfp3,-neon | FileCheck %s
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vlddup.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 69 %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1) 83 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) 98 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %A2, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2) 113 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16) 122 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly 123 declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly 124 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly 134 %tmp0 = tail call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 0, i32 8) 152 %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8 [all...] |
2010-04-09-NeonSelect.ll | 1 ; RUN: llc -march=arm -mattr=+neon < %s 2 ; Radar 7770501: Don't crash on SELECT and SELECT_CC with NEON vector values.
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2010-06-29-PartialRedefFastAlloc.ll | 19 %0 = call <2 x i64> @llvm.arm.neon.vld1.v2i64(i8* %arg, i32 1) 25 declare <2 x i64> @llvm.arm.neon.vld1.v2i64(i8*, i32) nounwind readonly
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vmov.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 267 %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovns.v8i8(<8 x i16> %tmp1) 275 %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovns.v4i16(<4 x i32> %tmp1) 283 %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovns.v2i32(<2 x i64> %tmp1) 291 %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovnu.v8i8(<8 x i16> %tmp1) 299 %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovnu.v4i16(<4 x i32> %tmp1) 307 %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovnu.v2i32(<2 x i64> %tmp1) 315 %tmp2 = call <8 x i8> @llvm.arm.neon.vqmovnsu.v8i8(<8 x i16> %tmp1) 323 %tmp2 = call <4 x i16> @llvm.arm.neon.vqmovnsu.v4i16(<4 x i32> %tmp1) 331 %tmp2 = call <2 x i32> @llvm.arm.neon.vqmovnsu.v2i32(<2 x i64> %tmp1 [all...] |
/external/skia/src/opts/ |
SkXfermode_opts_arm_neon.h | 24 // it with -mfpu=neon.
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
armVCM4P10_UnpackBlock4x4_s.S | 10 .fpu neon
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/ndk/toolchains/arm-linux-androideabi-4.6/ |
setup.mk | 51 TARGET_CFLAGS.neon := -mfpu=neon 106 $(call get-src-files-with-tag,neon),\ 107 $(TARGET_CFLAGS.neon)) \
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/ndk/toolchains/arm-linux-androideabi-4.7/ |
setup.mk | 51 TARGET_CFLAGS.neon := -mfpu=neon 106 $(call get-src-files-with-tag,neon),\ 107 $(TARGET_CFLAGS.neon)) \
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/ndk/toolchains/arm-linux-androideabi-4.8/ |
setup.mk | 51 TARGET_CFLAGS.neon := -mfpu=neon 106 $(call get-src-files-with-tag,neon),\ 107 $(TARGET_CFLAGS.neon)) \
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/external/clang/lib/Headers/ |
module.map | 10 explicit module neon { 11 requires neon
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/external/oprofile/events/arm/armv7/ |
events.h | 66 "NEON data access that hits L1 cache"}, 68 "NEON cacheable data access that hits L1 cache"}, 70 "L2 access as a result of NEON memory access"}, 72 "Any NEON hit in L2 cache"}, 90 "Number of cycles the processor waits on MRC data from NEON"}, 92 "Number of cycles the processor waits on NEON instruction queue or NEON load queue"}, 94 "Number of cycles NEON and integer processors are not idle"},
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/development/ndk/samples/hello-neon/jni/ |
helloneon.c | 77 * apps/samples/hello-neon/project/src/com/example/neon/HelloNeon.java 113 strlcat(buffer, "Neon version : ", sizeof buffer); 129 strlcat(buffer, "CPU doesn't support NEON !\n", sizeof buffer); 133 /* Benchmark small FIR filter loop - Neon version */ 153 D("neon[%d] = %d expected %d", nn, fir_output[nn], fir_output_expected[nn]);
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/external/libyuv/files/source/ |
cpu_id.cc | 111 char* p = strstr(buf, " neon"); 186 // linux arm parse text file for neon detect. 189 // gcc -mfpu=neon defines __ARM_NEON__ 190 // Enable Neon if you want support for Neon and Arm, and use MaskCpuFlags 191 // to disable Neon on devices that do not have it.
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/external/webrtc/src/modules/audio_coding/codecs/isac/fix/source/ |
lattice_neon.S | 14 @ filter routine for iSAC codec, optimized for ARM Neon platform. 28 @ of WEBRTC_SPL_MUL_16_32_RSFT15 and LATTICE_MUL_32_32_RSFT16 with Neon 33 .fpu neon 47 vdup.32 d28, r0 @ Initialize Neon register with input0 48 vdup.32 d29, r1 @ Initialize Neon register with input1 49 vdup.32 d30, r2 @ Initialize Neon register with input2
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/external/libvpx/libvpx/build/make/ |
Android.mk | 37 # By default libvpx will detect at runtime the existance of NEON extension. 40 # Configuring with --disable-runtime-cpu-detect will assume presence of NEON. 41 # Configuring with --disable-runtime-cpu-detect --disable-neon will remove any 42 # NEON dependency. 143 # Pull out assembly files, splitting NEON from the rest. This is 144 # done to specify that the NEON assembly files use NEON assembler flags. 148 $(if $(findstring neon,$(v)),,$(v))) 157 $(if $(findstring neon,$(v)),$(v),)) 162 %.s.neon, \ [all...] |
/external/llvm/test/CodeGen/Thumb2/ |
crash.ll | 18 tail call void @llvm.arm.neon.vst4.v4i32(i8* %8, <4 x i32> %1, <4 x i32> %3, <4 x i32> %5, <4 x i32> %7, i32 1) 22 declare void @llvm.arm.neon.vst4.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32) nounwind 48 tail call void @llvm.arm.neon.vst4.v4i32(i8* bitcast ([16 x i32]* @dbuf to i8*), <4 x i32> %2, <4 x i32> %3, <4 x i32> %4, <4 x i32> %5, i32 1) nounwind 56 %vld1 = tail call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %p, i32 1) 58 tail call void @llvm.arm.neon.vst1.v4f32(i8* %p, <4 x float> %vld1, i32 1) 62 declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly 64 declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind
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