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  /external/llvm/test/CodeGen/ARM/
neon_fpconv.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
18 ; We used to generate vmovs between scalar and vfp/neon registers.
2009-08-29-TooLongSplat.ll 1 ; RUN: llc < %s -mattr=+neon
2009-09-13-InvalidSubreg.ll 1 ; RUN: llc -mattr=+neon < %s
12 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
45 %22 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %20, <2 x float> %21) nounwind ; <<2 x float>> [#uses=2]
46 %23 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %22, <2 x float> %22) nounwind ; <<2 x float>> [#uses=2]
2009-09-23-LiveVariablesBug.ll 1 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+neon
2011-09-09-OddVectorDivision.ll 1 ; RUN: llc -mtriple=armv7-- < %s -mattr=-neon
2011-10-26-ExpandUnalignedLoadCrash.ll 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 -mattr=+neon,+neonfp -relocation-model=pic
2011-11-09-IllegalVectorFPIntConvert.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
deps-fix.ll 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a9 -mattr=+neon,+neonfp -float-abi=hard -mtriple armv7-linux-gnueabi | FileCheck %s
domain-conv-vmovs.ll 1 ; RUN: llc -verify-machineinstrs -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a9 -mattr=+neon,+neonfp -float-abi=hard < %s | FileCheck %s
55 ; Do an operation (which will end up NEON because of +neonfp) to convince the
56 ; execution-domain pass that NEON is a good thing to use.
90 ; Check that the movement to and from GPRs takes place in the NEON domain.
fabss.ll 2 ; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+neon | FileCheck %s -check-prefix=NFP0
fadds.ll 2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
fdivs.ll 2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
fsubs.ll 5 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
integer_insertelement.ll 1 ; RUN: llc %s -o - -march=arm -mattr=+neon | FileCheck %s
  /external/scrypt/
Scrypt-config.mk 47 lib/crypto/crypto_scrypt-neon.c \
84 # Hacks for ARM NEON support
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/
h264bsdClearMbLayer.S 21 .fpu neon
30 /* -- NEON registers -- */
  /ndk/docs/
sidenav.html 18 <li><a href="CPU-ARM-NEON.html" target="content">CPU ARM Neon</a></li>
  /dalvik/vm/mterp/
rebuild.sh 23 for arch in portable allstubs armv5te armv5te-vfp armv7-a armv7-a-neon mips x86; do TARGET_ARCH_EXT=$arch make -f Makefile-mterp; done
  /device/generic/mini-emulator-mips/
mini_emulator_mips.mk 17 $(call inherit-product, device/generic/mini-emulator-armv7-a-neon/mini_emulator_common.mk)
  /device/generic/mini-emulator-x86/
mini_emulator_x86.mk 17 $(call inherit-product, device/generic/mini-emulator-armv7-a-neon/mini_emulator_common.mk)
  /external/chromium_org/third_party/opus/src/m4/
as-gcc-inline-assembly.m4 36 AC_MSG_CHECKING([if assembler supports NEON instructions on ARM])
  /external/clang/test/CodeGen/
vld_dup.c 17 // CHECK: [[T168:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld3lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
29 // CHECK: [[T178:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.arm.neon.vld4lane.v2i32(i8* {{.*}}, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 {{[0-9]+}}, i32 {{[0-9]+}})
44 // CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld3.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
47 // CHECK: {{%.*}} = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.arm.neon.vld4.v1i64(i8* {{.*}}, i32 {{[0-9]+}})
  /external/clang/test/Sema/
arm-neon-types.c 39 #include "arm-neon-types.c"
  /external/llvm/test/MC/Disassembler/ARM/
vfp4.txt 1 # RUN: llvm-mc < %s -triple thumbv7-unknown-unknown --disassemble -mattr=+neon,+vfp4 | FileCheck %s
  /external/webrtc/
android-webrtc.mk 25 # '-DWEBRTC_DETECT_ARM_NEON' # only used in a build configuration without Neon

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