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  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/
armCOMM_Version.h 36 #define OMX_ARM_BUILD_ARCHITECTURE "ARM Architecture V7 with NEON"
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
armVCM4P10_DeblockingChroma_unsafe_s.S 10 .fpu neon
armVCM4P10_TransformResidual4x4_s.S 10 .fpu neon
omxVCM4P10_DeblockLuma_I.S 10 .fpu neon
omxVCM4P10_TransformDequantChromaDCFromPair_s.S 10 .fpu neon
  /frameworks/base/data/sounds/
AudioPackage12.mk 11 ALARM_FILES := Argon Carbon Helium Krypton Neon Oxygen Osmium Platinum
AudioPackage9.mk 15 $(LOCAL_PATH)/alarms/ogg/Neon.ogg:system/media/audio/alarms/Neon.ogg \
  /frameworks/rs/cpu_ref/
Android.mk 43 LOCAL_ASFLAGS := -mfpu=neon
  /ndk/toolchains/arm-linux-androideabi-clang3.2/
setup.mk 85 TARGET_CFLAGS.neon := -mfpu=neon
137 $(call get-src-files-with-tag,neon),\
138 $(TARGET_CFLAGS.neon)) \
  /ndk/toolchains/arm-linux-androideabi-clang3.3/
setup.mk 85 TARGET_CFLAGS.neon := -mfpu=neon
137 $(call get-src-files-with-tag,neon),\
138 $(TARGET_CFLAGS.neon)) \
  /external/llvm/test/CodeGen/ARM/
vcge.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
148 %tmp3 = call <2 x i32> @llvm.arm.neon.vacged(<2 x float> %tmp1, <2 x float> %tmp2)
157 %tmp3 = call <4 x i32> @llvm.arm.neon.vacgeq(<4 x float> %tmp1, <4 x float> %tmp2)
161 declare <2 x i32> @llvm.arm.neon.vacged(<2 x float>, <2 x float>) nounwind readnone
162 declare <4 x i32> @llvm.arm.neon.vacgeq(<4 x float>, <4 x float>) nounwind readnone
199 tail call void @llvm.arm.neon.vst1.v8i8(i8* undef, <8 x i8> %5, i32 1)
203 declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>, i32) nounwind
vcgt.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
2 ; RUN: llc < %s -march=arm -mattr=+neon -regalloc=basic | FileCheck %s
149 %tmp3 = call <2 x i32> @llvm.arm.neon.vacgtd(<2 x float> %tmp1, <2 x float> %tmp2)
158 %tmp3 = call <4 x i32> @llvm.arm.neon.vacgtq(<4 x float> %tmp1, <4 x float> %tmp2)
175 declare <2 x i32> @llvm.arm.neon.vacgtd(<2 x float>, <2 x float>) nounwind readnone
176 declare <4 x i32> @llvm.arm.neon.vacgtq(<4 x float>, <4 x float>) nounwind readnone
vector-extend-narrow.ll 23 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
52 ; Note: vld1 here is reasonably important. Mixing VFP and NEON
  /external/clang/utils/TableGen/
TableGen.cpp 128 clEnumValN(GenArmNeon, "gen-arm-neon",
130 clEnumValN(GenArmNeonSema, "gen-arm-neon-sema",
131 "Generate ARM NEON sema support for clang"),
132 clEnumValN(GenArmNeonTest, "gen-arm-neon-test",
133 "Generate ARM NEON tests for clang"),
  /ndk/sources/android/cpufeatures/
cpu-features.c 49 * Handle kernels that only report 'neon', and not 'vfpv3'
50 * (VFPv3 is mandated by the ARM architecture is Neon is implemented)
504 if (has_list_item(cpuFeatures, "neon"))
691 // field that support D32 also support NEON, so this should
705 // Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA
927 * NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides
929 * 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all
930 * NEON registers are also mapped to the same register banks.
939 * VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fuse
    [all...]
  /dalvik/vm/compiler/codegen/arm/armv7-a-neon/
ArchVariant.cpp 30 #include "../../../template/armv7-a-neon/TemplateOpList.h"
44 #include "../../../template/armv7-a-neon/TemplateOpList.h"
  /external/chromium_org/third_party/opus/src/celt/arm/
armcpu.c 110 /* Search for edsp and neon flag */
118 p = strstr(buf, " neon");
  /external/eigen/Eigen/src/Core/arch/NEON/
PacketMath.h 23 // FIXME NEON has 16 quad registers, but since the current register allocator
43 //Special treatment for Apple's llvm-gcc, its NEON packet types are unions
125 // NEON does not offer a divide instruction, we have to do a reciprocal approximation
126 // However NEON in contrast to other SIMD engines (AltiVec/SSE), offers
143 { eigen_assert(false && "packet integer division are not supported by NEON");
157 // Logical Operations are not supported for float, so we have to reinterpret casts using NEON intrinsics
256 // NEON zip performs interleaving of the supplied vectors.
290 // NEON zip performs interleaving of the supplied vectors.
  /external/llvm/lib/Target/ARM/
ARMHazardRecognizer.cpp 52 // Skip over one non-VFP / NEON instruction.
54 // On A9, AGU and NEON/FPU are muxed.
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/
h264bsdFillRow7.S 21 .fpu neon
34 /* -- NEON registers -- */
  /frameworks/compile/slang/
rslib.ll 41 declare <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32>, <4 x i16>, <4 x i16>)
44 %A = tail call <4 x i32> @llvm.arm.neon.vmlals.v4i32(<4 x i32> %a, <4 x i16> %b, <4 x i16> %c)
  /frameworks/rs/driver/runtime/
Android.mk 42 arch/neon.ll \
98 # Build a NEON-enabled version of the library (if possible)
  /dalvik/vm/compiler/codegen/arm/armv7-a/
Codegen.cpp 53 #include "../armv7-a-neon/MethodCodegenDriver.cpp"
  /dalvik/vm/compiler/template/
config-armv7-a-neon 34 op-start armv7-a-neon
  /development/ndk/samples/hello-neon/jni/
helloneon-intrinsics.c 21 * the armeabi-v7a ABI, and should be built in NEON mode

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