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  /external/libvpx/libvpx/test/
convolve_test.cc 652 INSTANTIATE_TEST_CASE_P(NEON, ConvolveTest, ::testing::Values(
  /external/libvpx/libvpx/vp8/common/arm/neon/
sixtappredict16x16_neon.asm 36 ;Note: To take advantage of 8-bit mulplication instruction in NEON. First apply abs() to
  /external/libvpx/libvpx/vp8/encoder/
ethreading.c 413 * This will also require modifications to the x86 and neon assembly.
  /external/libyuv/files/include/libyuv/
row.h 114 // The following are available on Neon platforms
  /external/llvm/lib/CodeGen/
ExecutionDepsFix.cpp 16 // have similar issues when they are configured with both VFP and NEON
  /external/llvm/lib/Target/ARM/
ARMTargetTransformInfo.cpp 400 // On NEON a a vector select gets lowered to vbsl.
  /external/llvm/test/CodeGen/AArch64/
neon-bitcast.ll 1 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -verify-machineinstrs < %s | FileCheck %s
  /external/llvm/test/CodeGen/ARM/
unaligned_load_store_vector.ll 1 ;RUN: llc < %s -march=arm -mattr=+v7 -mattr=+neon | FileCheck %s
vdup.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
vshift.ll 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
  /external/llvm/test/MC/AArch64/
neon-mov.s 1 // RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
neon-saturating-add-sub.s 1 // RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
  /external/llvm/test/MC/ARM/
simple-fp-encoding.s 392 @ Use NEON to load some f32 immediates that don't fit the f8 representation.
  /external/qemu/
Changelog 157 - ARM v6, v7, NEON SIMD and SMP emulation (Paul Brook/CodeSourcery)
Makefile.common 575 QEMU_TARGET_XML_SOURCES := arm-core arm-neon arm-vfp arm-vfp3
arm-dis.c 125 %<bitfield>D print as a NEON D register
126 %<bitfield>Q print as a NEON Q register
289 /* Data transfer between ARM and NEON registers */
499 /* Neon opcode table: This does not encode the top byte -- that is
518 %<bitfield>D print as a NEON D register
519 %<bitfield>Q print as a NEON Q register
520 %<bitfield>R print as a NEON D or Q register
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  /external/skia/src/opts/
SkBlitRow_opts_arm.cpp 17 // Define USE_NEON_CODE to indicate that we need to build NEON routines
SkXfermode_opts_arm_neon.cpp 707 // Unrolled NEON code
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
omxVCM4P10_PredictIntraChroma_8x8_s.s 67 ;// Neon Registers
omxVCM4P10_PredictIntra_4x4_s.s 64 ;// Neon registers
  /frameworks/base/tests/CoreTests/android/core/
TestWebServer.java 720 // Seems 301 needs a body by neon (although spec
  /frameworks/compile/libbcc/lib/Renderscript/
RSCompilerDriver.cpp 185 // NEON should be disable when full-precision floating point is required.
  /libcore/support/src/test/java/tests/support/
Support_TestWebServer.java 649 // Seems 301 needs a body by neon (although spec
  /external/chromium/build/
common.gypi 103 # Set Neon compilation flags (only meaningful if armv7==1).
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
sha512-armv4.S 441 .fpu neon
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