/external/llvm/test/CodeGen/ARM/ |
vneg.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 71 %tmp2 = call <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8> %tmp1) 79 %tmp2 = call <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16> %tmp1) 87 %tmp2 = call <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32> %tmp1) 95 %tmp2 = call <16 x i8> @llvm.arm.neon.vqneg.v16i8(<16 x i8> %tmp1) 103 %tmp2 = call <8 x i16> @llvm.arm.neon.vqneg.v8i16(<8 x i16> %tmp1) 111 %tmp2 = call <4 x i32> @llvm.arm.neon.vqneg.v4i32(<4 x i32> %tmp1) 115 declare <8 x i8> @llvm.arm.neon.vqneg.v8i8(<8 x i8>) nounwind readnone 116 declare <4 x i16> @llvm.arm.neon.vqneg.v4i16(<4 x i16>) nounwind readnone 117 declare <2 x i32> @llvm.arm.neon.vqneg.v2i32(<2 x i32>) nounwind readnon [all...] |
2011-08-12-vmovqqqq-pseudo.ll | 7 %vld3_lane = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16(i8* undef, <8 x i16> undef, <8 x i16> undef, <8 x i16> zeroinitializer, i32 7, i32 2) 12 declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
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2012-05-10-PreferVMOVtoVDUP32.ll | 10 tail call void @llvm.arm.neon.vst1.v2i32(i8* %0, <2 x i32> %vecinit1.i, i32 4) 14 declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>, i32) nounwind
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2012-08-30-select.ll | 10 %vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* %bar, i32 1) 17 declare <16 x i8> @llvm.arm.neon.vld1.v16i8(i8* , i32 )
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vld3.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 2 ; RUN: llc < %s -march=arm -mattr=+neon -regalloc=basic | FileCheck %s 19 %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8(i8* %A, i32 32) 30 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1) 43 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1) 56 %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32(i8* %tmp0, i32 1) 67 %tmp1 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32(i8* %tmp0, i32 1) 79 %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64(i8* %tmp0, i32 16) 91 %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8(i8* %A, i32 32) 103 %tmp1 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16(i8* %tmp0, i32 1 [all...] |
2009-08-31-TwoRegShuffle.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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vaba.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 9 %tmp4 = call <8 x i8> @llvm.arm.neon.vabds.v8i8(<8 x i8> %tmp2, <8 x i8> %tmp3) 20 %tmp4 = call <4 x i16> @llvm.arm.neon.vabds.v4i16(<4 x i16> %tmp2, <4 x i16> %tmp3) 31 %tmp4 = call <2 x i32> @llvm.arm.neon.vabds.v2i32(<2 x i32> %tmp2, <2 x i32> %tmp3) 42 %tmp4 = call <8 x i8> @llvm.arm.neon.vabdu.v8i8(<8 x i8> %tmp2, <8 x i8> %tmp3) 53 %tmp4 = call <4 x i16> @llvm.arm.neon.vabdu.v4i16(<4 x i16> %tmp2, <4 x i16> %tmp3) 64 %tmp4 = call <2 x i32> @llvm.arm.neon.vabdu.v2i32(<2 x i32> %tmp2, <2 x i32> %tmp3) 75 %tmp4 = call <16 x i8> @llvm.arm.neon.vabds.v16i8(<16 x i8> %tmp2, <16 x i8> %tmp3) 86 %tmp4 = call <8 x i16> @llvm.arm.neon.vabds.v8i16(<8 x i16> %tmp2, <8 x i16> %tmp3) 97 %tmp4 = call <4 x i32> @llvm.arm.neon.vabds.v4i32(<4 x i32> %tmp2, <4 x i32> %tmp3 [all...] |
2009-08-29-ExtractEltf32.ll | 1 ; RUN: llc < %s -mattr=+neon 7 %0 = tail call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> undef, <2 x float> undef) nounwind ; <<2 x float>> [#uses=1] 25 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnone
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2010-06-11-vmovdrr-bitcast.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon 15 tail call void @llvm.arm.neon.vst2.v8i8(i8* %b, <8 x i8> %tmp16.i, <8 x i8> %tmp20.i, i32 1) nounwind 19 declare void @llvm.arm.neon.vst2.v8i8(i8*, <8 x i8>, <8 x i8>, i32) nounwind
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vcvt.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s 71 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float> %tmp1, i32 1) 79 %tmp2 = call <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float> %tmp1, i32 1) 87 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1) 95 %tmp2 = call <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32> %tmp1, i32 1) 99 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxs.v2i32.v2f32(<2 x float>, i32) nounwind readnone 100 declare <2 x i32> @llvm.arm.neon.vcvtfp2fxu.v2i32.v2f32(<2 x float>, i32) nounwind readnone 101 declare <2 x float> @llvm.arm.neon.vcvtfxs2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone 102 declare <2 x float> @llvm.arm.neon.vcvtfxu2fp.v2f32.v2i32(<2 x i32>, i32) nounwind readnone 108 %tmp2 = call <4 x i32> @llvm.arm.neon.vcvtfp2fxs.v4i32.v4f32(<4 x float> %tmp1, i32 1 [all...] |
vld2.ll | 1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s 18 %tmp1 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2.v8i8(i8* %A, i32 8) 30 %tmp1 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2.v4i16(i8* %tmp0, i32 32) 41 %tmp1 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2.v2i32(i8* %tmp0, i32 1) 52 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) 65 %tmp1 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2.v2f32(i8* %tmp0, i32 1) 79 %tmp1 = call %struct.__neon_int64x1x2_t @llvm.arm.neon.vld2.v1i64(i8* %tmp0, i32 32) 90 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 8) 102 %tmp1 = call %struct.__neon_int8x16x2_t @llvm.arm.neon.vld2.v16i8(i8* %A, i32 16) 116 %tmp1 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2.v8i16(i8* %tmp0, i32 16 [all...] |
/build/core/combo/arch/arm/ |
armv7-a-neon.mk | 2 # Generating binaries for the ARMv7-a architecture and higher with NEON 25 -mfpu=neon
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/development/ndk/samples/hello-neon/src/com/example/neon/ |
HelloNeon.java | 1 package com.example.neon; 31 * /data/data/com.example.neon/lib/libhelloneon.so at
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/external/clang/include/clang/Basic/ |
CMakeLists.txt | 31 # ARM NEON 32 clang_tablegen(arm_neon.inc -gen-arm-neon-sema
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/external/libvpx/libvpx/vp8/ |
vp8_common.mk | 161 # common (neon) 162 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/bilinearpredict4x4_neon$(ASM) 163 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/bilinearpredict8x4_neon$(ASM) 164 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/bilinearpredict8x8_neon$(ASM) 165 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/bilinearpredict16x16_neon$(ASM) 166 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/copymem8x4_neon$(ASM) 167 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/copymem8x8_neon$(ASM) 168 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/copymem16x16_neon$(ASM) 169 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/dc_only_idct_add_neon$(ASM) 170 VP8_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/iwalsh_neon$(ASM [all...] |
/external/clang/lib/Headers/ |
Android.mk | 8 $(call transform-host-clang-td-to-out,arm-neon)
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/external/clang/test/Modules/ |
compiler_builtins_arm.m | 6 @import _Builtin_intrinsics.arm.neon;
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/external/clang/test/Preprocessor/ |
aarch64-target-features.c | 33 // RUN: %clang -target aarch64-none-linux-gnu -mfpu=neon -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-NEON %s 34 // CHECK-NEON: __AARCH_ADVSIMD_FP 35 // CHECK-NEON: __AARCH_FEATURE_ADVSIMD
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/external/libyuv/ |
README.google | 9 Specifically libyuv is optimized for SSE2/SSSE3 and Neon and has demonstrated
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/external/libyuv/files/unit_test/testdata/ |
tegra3.txt | 14 Features : swp half thumb fastmult vfp edsp neon vfpv3
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/external/pixman/pixman/ |
Android.mk | 45 # Will only be used if runtime detection reports NEON capabilities 48 pixman-arm-neon.c \ 49 pixman-arm-neon-asm.S \ 50 pixman-arm-neon-asm-bilinear.S
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/external/clang/test/CodeGen/ |
arm-vector-align.c | 12 // Radar 9311427: Check that alignment specifier is used in Neon load/store 17 // CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16) 19 // CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16)
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/external/clang/test/Sema/ |
aarch64-neon-vector-types.c | 9 // Define some valid Neon types. 33 typedef __attribute__((neon_vector_type(1))) int int32x1_t; // expected-error{{Neon vector size must be 64 or 128 bits}} 34 typedef __attribute__((neon_vector_type(3))) int int32x3_t; // expected-error{{Neon vector size must be 64 or 128 bits}}
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neon-vector-types.c | 8 // Define some valid Neon types. 32 typedef __attribute__((neon_vector_type(1))) int int32x1_t; // expected-error{{Neon vector size must be 64 or 128 bits}} 33 typedef __attribute__((neon_vector_type(3))) int int32x3_t; // expected-error{{Neon vector size must be 64 or 128 bits}}
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/external/libvpx/libvpx/vpx_scale/ |
vpx_scale_rtcd.sh | 20 specialize vp8_yv12_extend_frame_borders neon 23 specialize vp8_yv12_copy_frame neon 26 specialize vpx_yv12_copy_y neon
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