| /external/chromium_org/sdch/open-vcdiff/src/ |
| decodetable_test.cc | 47 int opcode) {
48 g_exercise_code_table_->inst1[opcode] = inst1;
49 g_exercise_code_table_->mode1[opcode] = mode1;
50 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
51 g_exercise_code_table_->inst2[opcode] = inst2;
52 g_exercise_code_table_->mode2[opcode] = mode2;
53 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
58 int opcode = 0; local
77 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
78 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
412 int opcode = 0; local
[all...] |
| /external/open-vcdiff/src/ |
| decodetable_test.cc | 47 int opcode) {
48 g_exercise_code_table_->inst1[opcode] = inst1;
49 g_exercise_code_table_->mode1[opcode] = mode1;
50 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
51 g_exercise_code_table_->inst2[opcode] = inst2;
52 g_exercise_code_table_->mode2[opcode] = mode2;
53 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
58 int opcode = 0; local
77 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
78 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
412 int opcode = 0; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/FP/ |
| ThumbVFP.cpp | 68 TemplateOpcode opcode; local
74 switch (mir->dalvikInsn.opcode) {
77 opcode = TEMPLATE_ADD_FLOAT_VFP;
81 opcode = TEMPLATE_SUB_FLOAT_VFP;
85 opcode = TEMPLATE_DIV_FLOAT_VFP;
89 opcode = TEMPLATE_MUL_FLOAT_VFP;
102 genDispatchToHandler(cUnit, opcode);
114 TemplateOpcode opcode; local
116 switch (mir->dalvikInsn.opcode) {
119 opcode = TEMPLATE_ADD_DOUBLE_VFP
156 Opcode opcode = mir->dalvikInsn.opcode; local
[all...] |
| /dalvik/vm/mterp/mips/ |
| OP_CONST_CLASS.S | 12 bnez v0, .L${opcode}_resolve # v0!=0 => resolved-ok
26 .L${opcode}_resolve:
28 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| OP_CONST_STRING.S | 12 bnez v0, .L${opcode}_resolve
25 .L${opcode}_resolve:
27 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| OP_CONST_STRING_JUMBO.S | 14 bnez v0, .L${opcode}_resolve
28 .L${opcode}_resolve:
30 GET_INST_OPCODE(t1) # extract opcode from rINST
|
| unflop.S | 22 .L${opcode}_set_vreg:
27 .L${opcode}_set_vreg_f:
30 GET_INST_OPCODE(t1) # extract opcode from rINST
|
| OP_NEW_ARRAY.S | 22 beqz a0, .L${opcode}_resolve
30 .L${opcode}_finish:
37 GET_INST_OPCODE(t0) # extract opcode from rINST
48 .L${opcode}_resolve:
59 b .L${opcode}_finish # continue with ${opcode}_finish
|
| /dalvik/vm/mterp/x86/ |
| OP_NEW_INSTANCE.S | 25 je .L${opcode}_resolve # no, go do it
26 .L${opcode}_resolved: # on entry, ecx<- class
28 jne .L${opcode}_needinit
29 .L${opcode}_initialized: # on entry, ecx<- class
43 jne .L${opcode}_jitCheck
45 .L${opcode}_end:
58 .L${opcode}_jitCheck:
60 jne .L${opcode}_end # yes, finish
80 .L${opcode}_needinit:
86 jne .L${opcode}_initialized # success, continu
[all...] |
| bindiv.S | 16 jne .L${opcode}_continue_div
18 jne .L${opcode}_continue_div
26 .L${opcode}_continue_div:
|
| bindiv2addr.S | 16 jne .L${opcode}_continue_div2addr
18 jne .L${opcode}_continue_div2addr
26 .L${opcode}_continue_div2addr:
|
| bindivLit8.S | 14 jne .L${opcode}_continue_div
16 jne .L${opcode}_continue_div
24 .L${opcode}_continue_div:
|
| OP_INVOKE_OBJECT_INIT_RANGE.S | 17 jnz .L${opcode}_setFinal # yes, go
18 .L${opcode}_finish:
22 jnz .L${opcode}_debugger # Yes - skip optimization
29 .L${opcode}_setFinal:
37 jmp .L${opcode}_finish
46 .L${opcode}_debugger:
|
| /external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/d3d1x/d3d1xshader/src/ |
| sm4_analyze.cpp | 45 switch(program.insns[insn_num]->opcode)
53 check(program.insns[v]->opcode == SM4_OPCODE_LOOP);
67 if(program.insns[insn_num]->opcode == SM4_OPCODE_ELSE)
68 check(program.insns[v]->opcode == SM4_OPCODE_IF);
70 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE);
79 if(program.insns[insn_num]->opcode == SM4_OPCODE_ENDIF)
80 check(program.insns[v]->opcode == SM4_OPCODE_IF || program.insns[v]->opcode == SM4_OPCODE_ELSE);
82 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE)
[all...] |
| /external/mesa3d/src/gallium/state_trackers/d3d1x/d3d1xshader/src/ |
| sm4_analyze.cpp | 45 switch(program.insns[insn_num]->opcode)
53 check(program.insns[v]->opcode == SM4_OPCODE_LOOP);
67 if(program.insns[insn_num]->opcode == SM4_OPCODE_ELSE)
68 check(program.insns[v]->opcode == SM4_OPCODE_IF);
70 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE);
79 if(program.insns[insn_num]->opcode == SM4_OPCODE_ENDIF)
80 check(program.insns[v]->opcode == SM4_OPCODE_IF || program.insns[v]->opcode == SM4_OPCODE_ELSE);
82 check(program.insns[v]->opcode == SM4_OPCODE_SWITCH || program.insns[v]->opcode == SM4_OPCODE_CASE)
[all...] |
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
| Instruction10t.java | 33 import org.jf.dexlib.Code.Opcode;
41 public Instruction10t(Opcode opcode, int offA) {
42 super(opcode);
53 private Instruction10t(Opcode opcode, byte[] buffer, int bufferIndex) {
54 super(opcode);
56 assert buffer[bufferIndex] == opcode.value;
71 out.writeByte(opcode.value);
88 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex)
[all...] |
| Instruction20t.java | 33 import org.jf.dexlib.Code.Opcode;
42 public Instruction20t(Opcode opcode, int offA) {
43 super(opcode);
54 private Instruction20t(Opcode opcode, byte[] buffer, int bufferIndex) {
55 super(opcode);
57 assert buffer[bufferIndex] == opcode.value;
72 out.writeByte(opcode.value);
90 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex)
[all...] |
| Instruction21t.java | 33 import org.jf.dexlib.Code.Opcode;
44 public Instruction21t(Opcode opcode, short regA, short offB) {
45 super(opcode);
59 private Instruction21t(Opcode opcode, byte[] buffer, int bufferIndex) {
60 super(opcode);
62 assert buffer[bufferIndex] == opcode.value;
70 out.writeByte(opcode.value);
99 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex)
[all...] |
| Instruction22t.java | 33 import org.jf.dexlib.Code.Opcode;
45 public Instruction22t(Opcode opcode, byte regA, byte regB, short offC) {
46 super(opcode);
62 private Instruction22t(Opcode opcode, byte[] buffer, int bufferIndex) {
63 super(opcode);
65 assert buffer[bufferIndex] == opcode.value;
75 out.writeByte(opcode.value);
108 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex)
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| SimpleInsn.java | 31 * @param opcode the opcode; one of the constants from {@link Dops}
37 public SimpleInsn(Dop opcode, SourcePosition position,
39 super(opcode, position, registers);
44 public DalvInsn withOpcode(Dop opcode) {
45 return new SimpleInsn(opcode, getPosition(), getRegisters());
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| SimpleInsn.java | 31 * @param opcode the opcode; one of the constants from {@link Dops}
37 public SimpleInsn(Dop opcode, SourcePosition position,
39 super(opcode, position, registers);
44 public DalvInsn withOpcode(Dop opcode) {
45 return new SimpleInsn(opcode, getPosition(), getRegisters());
|
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| SimpleInsn.java | 31 * @param opcode the opcode; one of the constants from {@link Dops}
37 public SimpleInsn(Dop opcode, SourcePosition position,
39 super(opcode, position, registers);
44 public DalvInsn withOpcode(Dop opcode) {
45 return new SimpleInsn(opcode, getPosition(), getRegisters());
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| TranslationAdvice.java | 28 * instruction with the given opcode operating on the given arguments,
33 * @param opcode {@code non-null;} the opcode
39 public boolean hasConstantOperation(Rop opcode,
44 * specified opcode to be in order and contiguous (eg, for an invoke-range)
46 * @param opcode {@code non-null;} opcode
51 public boolean requiresSourcesInOrder(Rop opcode, RegisterSpecList sources);
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| TranslationAdvice.java | 28 * instruction with the given opcode operating on the given arguments,
33 * @param opcode {@code non-null;} the opcode
39 public boolean hasConstantOperation(Rop opcode,
44 * specified opcode to be in order and contiguous (eg, for an invoke-range)
46 * @param opcode {@code non-null;} opcode
51 public boolean requiresSourcesInOrder(Rop opcode, RegisterSpecList sources);
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_DOUBLE_TO_INT_VFP.S | 23 bgez t0, .L${opcode}_set_vreg # nonzero == yes
33 blez t0, .L${opcode}_set_vreg # nonzero == yes
43 bnez t0, .L${opcode}_set_vreg # return zero for NaN
48 b .L${opcode}_set_vreg
54 bc1t .L${opcode}_set_vreg_f
60 bc1t .L${opcode}_set_vreg_f
65 bc1t .L${opcode}_set_vreg_f
68 b .L${opcode}_set_vreg_f
|
