| /external/grub/netboot/ |
| etherboot.h | 269 unsigned short opcode; member in struct:arprequest
341 unsigned short opcode; member in struct:tftp_t
381 unsigned short opcode; member in struct:tftpreq_t
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| /external/llvm/docs/ |
| HowToUseInstrMappings.rst | 64 ``int getPredOpcode(uint16_t Opcode, enum PredSense inPredSense)`` which
110 ``int getPredOpcode(uint16_t Opcode, enum PredSense inPredSense)`` to query
111 the table. Here, Function ``getPredOpcode`` takes two arguments, opcode of the
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| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 79 // This isn't a memory opcode because we'd need to attach two
138 virtual const char *getTargetNodeName(unsigned Opcode) const LLVM_OVERRIDE;
198 unsigned Opcode) const;
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_scan.c | 91 assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST);
92 info->opcode_count[fullinst->Instruction.Opcode]++;
307 if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
|
| tgsi_ureg.c | 927 static void validate( unsigned opcode,
932 const struct tgsi_opcode_info *info = tgsi_get_opcode_info( opcode );
943 unsigned opcode,
958 validate( opcode, num_dst, num_src );
962 out[0].insn.Opcode = opcode;
1072 unsigned opcode,
1096 opcode,
1118 unsigned opcode,
1145 opcode,
[all...] |
| /external/regex-re2/re2/testing/ |
| backtrack.cc | 166 switch (ip->opcode()) {
168 LOG(FATAL) << "Unexpected opcode: " << (int)ip->opcode();
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| /art/compiler/dex/portable/ |
| mir_to_gbc.cc | 691 Instruction::Code opcode = mir->dalvikInsn.opcode; local
692 int op_val = opcode;
699 LOG(INFO) << ".. " << Instruction::Name(opcode) << " 0x" << std::hex << op_val;
708 int attrs = mir_graph_->oat_data_flow_attributes_[opcode];
743 switch (opcode) {
1499 UNIMPLEMENTED(FATAL) << "Unsupported Dex opcode 0x" << std::hex << opcode; local
1535 int opcode = mir->dalvikInsn.opcode; local
1709 int opcode = mir->dalvikInsn.opcode; local
[all...] |
| /external/chromium_org/sandbox/win/src/sidestep/ |
| ia32_opcode_map.cpp | 5 // Opcode decoding maps. Based on the IA-32 Intel Architecture
16 * Opcode in the table is either 0 to indicate you're in the
20 const Opcode s_first_opcode_byte[] = {
[all...] |
| /external/chromium_org/third_party/tcmalloc/chromium/src/windows/ |
| ia32_opcode_map.cc | 33 * Opcode decoding maps. Based on the IA-32 Intel® Architecture
45 * Opcode in the table is either 0 to indicate you're in the
49 const Opcode s_first_opcode_byte[] = {
[all...] |
| /external/chromium_org/third_party/tcmalloc/vendor/src/windows/ |
| ia32_opcode_map.cc | 33 * Opcode decoding maps. Based on the IA-32 Intel® Architecture
45 * Opcode in the table is either 0 to indicate you're in the
49 const Opcode s_first_opcode_byte[] = {
[all...] |
| /external/chromium_org/tools/memory_watcher/ |
| ia32_opcode_map.cc | 6 * Opcode decoding maps. Based on the IA-32 Intel Architecture
18 * Opcode in the table is either 0 to indicate you're in the
22 const Opcode s_first_opcode_byte[] = {
[all...] |
| /external/chromium_org/tools/traceline/traceline/sidestep/ |
| ia32_opcode_map.cc | 5 // Opcode decoding maps. Based on the IA-32 Intel Architecture
16 * Opcode in the table is either 0 to indicate you're in the
20 const Opcode s_first_opcode_byte[] = {
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 139 Opcode opcode,
148 static_cast<int32_t>(opcode) << kOpcodeShift |
216 Shift opcode,
226 static_cast<int32_t>(opcode) << kShiftShift |
233 Shift opcode,
243 static_cast<int32_t>(opcode) << kShiftShift |
417 void ArmAssembler::EmitMulOp(Condition cond, int32_t opcode,
425 int32_t encoding = opcode |
744 void ArmAssembler::EmitVFPsss(Condition cond, int32_t opcode,
[all...] |
| /dalvik/vm/interp/ |
| Jit.cpp | 232 addr, offset, dexGetOpcodeName(decInsn->opcode));
274 // shadowSpace->traceLength, dexGetOpcodeName(decInsn.opcode));
684 dexGetOpcodeName(decInsn.opcode),(int)dpc);
685 dpc += dexGetWidthFromOpcode(decInsn.opcode);
745 if ((nextDecInsn.opcode != OP_MOVE_RESULT) &&
746 (nextDecInsn.opcode != OP_MOVE_RESULT_WIDE) &&
747 (nextDecInsn.opcode != OP_MOVE_RESULT_OBJECT))
802 /* Only add JIT support opcode to trace. End the trace if
803 * this opcode is not supported.
805 if (!dvmIsOpcodeSupportedByJit(decInsn.opcode)) {
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | 365 /// getOpcode - Return the SelectionDAG opcode value for this node. For
367 /// are the opcode values in the ISD and <target>ISD namespaces. For
371 /// isTargetOpcode - Test if this node has a target-specific opcode (in the
376 /// memory-referencing opcode (in the \<target\>ISD namespace and
382 /// isMachineOpcode - Test if this node has a post-isel opcode, directly
383 /// corresponding to a MachineInstr opcode.
387 /// true. It returns the MachineInstr opcode value that the node's opcode
390 assert(isMachineOpcode() && "Not a MachineInstr opcode!");
580 // Climb up glue edges until a machine-opcode node is found, or th
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| ir_to_mesa.cpp | 488 * The \c SCS opcode functions a bit differently than the other Mesa (or
504 /* Vertex programs cannot use the SCS opcode.
1216 const enum prog_opcode opcode = local
1975 prog_opcode opcode = OPCODE_NOP; local
[all...] |
| /external/mesa3d/src/mesa/program/ |
| ir_to_mesa.cpp | 488 * The \c SCS opcode functions a bit differently than the other Mesa (or
504 /* Vertex programs cannot use the SCS opcode.
1216 const enum prog_opcode opcode = local
1975 prog_opcode opcode = OPCODE_NOP; local
[all...] |
| /art/compiler/dex/quick/mips/ |
| int_mips.cc | 614 void MipsMir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
617 GenShiftOpLong(opcode, rl_dest, rl_src1, rl_shift);
620 void MipsMir2Lir::GenArithImmOpLong(Instruction::Code opcode,
623 GenArithOpLong(opcode, rl_dest, rl_src1, rl_src2);
|
| /art/runtime/entrypoints/portable/ |
| portable_throw_entrypoints.cc | 122 if (first_catch_instr->Opcode() != Instruction::MOVE_EXCEPTION) {
|
| /bionic/libc/kernel/common/linux/mmc/ |
| mmc.h | 30 u32 opcode; member in struct:mmc_command
|
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/opc_throw/ |
| Test_opc_throw.java | 31 * throw as a last opcode in the method.
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| HighRegisterPrefix.java | 30 * be met using a straightforward choice of a single opcode.
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| HighRegisterPrefix.java | 29 * be met using a straightforward choice of a single opcode.
|
| /dalvik/opcode-gen/ |
| README.txt | 29 * Implement/update the opcode in C in vm/mterp/c/...
|
| /dalvik/vm/analysis/ |
| VfyBasicBlock.cpp | 409 Opcode opcode = dexOpcodeFromCodeUnit(meth->insns[idx]); local
410 OpcodeFlags opFlags = dexGetFlagsFromOpcode(opcode);
445 } else if (opcode == OP_NOP && isDataChunk(meth->insns[nextIdx])) {
|
