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  /external/llvm/lib/AsmParser/
LLToken.h 142 // Instruction Opcodes (Opcode in UIntVal).
  /external/llvm/lib/Target/ARM/
Thumb2InstrInfo.h 34 // if there is not such an opcode.
  /external/llvm/lib/Target/Hexagon/InstPrinter/
HexagonInstPrinter.h 32 virtual StringRef getOpcodeName(unsigned Opcode) const;
  /external/llvm/lib/Target/MSP430/
MSP430ISelDAGToDAG.cpp 337 unsigned Opcode = 0;
340 Opcode = MSP430::MOV8rm_POST;
343 Opcode = MSP430::MOV16rm_POST;
349 return CurDAG->getMachineNode(Opcode, SDLoc(N),
  /external/llvm/lib/Target/NVPTX/
NVPTXGenericToNVVM.cpp 308 unsigned Opcode = C->getOpcode();
309 switch (Opcode) {
351 if (Instruction::isBinaryOp(Opcode)) {
356 if (Instruction::isCast(Opcode)) {
  /external/llvm/lib/Target/R600/
R600ISelLowering.h 55 /// \brief Lower ROTL opcode to BITALIGN
  /external/mesa3d/src/gallium/auxiliary/tgsi/
tgsi_sanity.c 317 if (inst->Instruction.Opcode == TGSI_OPCODE_END) {
324 info = tgsi_get_opcode_info( inst->Instruction.Opcode );
326 report_error( ctx, "(%u): Invalid instruction opcode", inst->Instruction.Opcode );
  /external/mesa3d/src/gallium/drivers/nv30/
nvfx_shader.h 78 * Each fragment program opcode appears to be comprised of 4 32-bit values.
93 * 24-29: opcode
114 * 31: opcode is branch
178 //== Opcode / Destination selection ==
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_inline_literals.c 69 rc_get_opcode_info(inst->U.I.Opcode);
radeon_program_pair.h 72 unsigned int Opcode:8;
  /external/mesa3d/src/gallium/state_trackers/egl/x11/
glxinit.c 137 __glXQueryServerString(Display * dpy, int opcode, CARD32 screen, CARD32 name)
158 req->reqType = opcode;
238 QueryVersion(Display * dpy, int opcode, int *major, int *minor)
246 req->reqType = opcode;
  /external/mesa3d/src/mapi/glapi/gen/
glX_API.xml 9 in the case of Render of VendorPrivate) and its opcode. Once
  /external/proguard/src/proguard/classfile/util/
InstructionSequenceMatcher.java 437 // Check the opcode.
438 return instruction1.opcode == instruction2.opcode ||
439 instruction1.canonicalOpcode() == instruction2.opcode;
  /external/proguard/src/proguard/optimize/
DuplicateInitializerInvocationFixer.java 103 if (constantInstruction.opcode == InstructionConstants.OP_INVOKESPECIAL)
  /external/proguard/src/proguard/preverify/
CodePreverifier.java 603 * Returns whether the given instruction opcode represents a dup or swap
606 private boolean isDupOrSwap(int opcode)
608 return opcode >= InstructionConstants.OP_DUP &&
609 opcode <= InstructionConstants.OP_SWAP;
  /external/tcpdump/
print-lane.c 112 tok2str(lecop2str, "opcode-#%u", EXTRACT_16BITS(&lec->lec_opcode)));
  /external/valgrind/main/docs/internals/
3_3_BUGSTATUS.txt 56 158730 Wont pend ppc: illegal opcode crash on instruction fctiwz
65 159720 Wont pend Opcode 0xFF 0x58 0xEB 0x5 unhandled on x86
290 r7347 r8085 Mgd 155091 Warning [...] unhandled DW_OP_ opcode 0x23
315 vx1826 vx1842 Vfd 161378 illegal opcode in debug libm (FUCOMPP)
3_4_BUGSTATUS.txt 100 189232 Illegal opcode - unhandled instruction bytes: 0xCB 0x55
  /frameworks/base/libs/hwui/
DisplayListLogBuffer.cpp 43 * opcode and the nesting level). If the type of information logged changes (for example,
  /libcore/dex/src/main/java/com/android/dex/
DexFormat.java 32 /** API level to target in order to suppress extended opcode usage */
  /packages/apps/Stk/src/com/android/stk/
ToneDialog.java 133 args.putInt(StkAppService.OPCODE, StkAppService.OP_RESPONSE);
  /prebuilts/devtools/tools/lib/
asm-tree-4.0.jar 
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/bits/
byteswap.h 67 `bswap' opcode. On i386 we have to use three instructions. */
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/bits/
byteswap.h 67 `bswap' opcode. On i386 we have to use three instructions. */
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/bits/
byteswap.h 67 `bswap' opcode. On i386 we have to use three instructions. */

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